RISC-V mv Pseudo-Instruction Details

Assembler pseudo-instruction

Register-to-register copy pseudo-instruction, expands to addi rd, rs, 0. Expresses assignment semantics more clearly than raw ADDI. Heavily used by compilers for register allocation, function argument setup, and temporary value preservation.

What You Write

mv rd, rs

Typical Real Expansion

addi rd, rs, 0

What This Pseudo Instruction Is Saving You From Writing

Improves readability by expressing assignment/move intent more clearly than raw addi rd, rs, 0. mov is one of the most common IR operations in compilers.

mv primarily means "Copy data between registers". It is assembler-level shorthand; when debugging, auditing, or reading machine code, reason from the real expansion and relocation semantics listed on this page.

Official Semantics Checklist

The official assembly manual treats mv as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.

The real semantics come from the ISA definitions of ADDI and the other expanded instructions, not from a separate mv hardware opcode.

How To Read The Expansion

Step 1

Assembler expands to addi rd, rs, 0.

Step 2

ADDI writes the result of rs + 0 to rd, equivalent to rd = rs. Changes no architectural state except rd.

What You May See In objdump / Disassembly

addi rd, rs, 0 shown as mv rd, rs in disassembly. Note that mv does not modify any flags — it is a pure data copy.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual

When To Think Of It First

Save a temporary result to another register

Variable assignment and transfer between registers

Prepare function call arguments (e.g., mv a0, t0)

Compiler register allocation copy propagation

Pitfalls / Common Confusions

MV is a pure data copy — unlike seqz/snez, it does not check zero or sign

On RV64, MV operates on the full XLEN (64 bits), not just the lower 32

mv rd, rs with rs=x0 is equivalent to li rd, 0 (zeroing)

FAQ

Is mv a real RISC-V instruction?

mv is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using mv?