Add sign-extended 12-bit immediate to rs1, place result in rd
ADDI (I-type, opcode=0010011, funct3=000) adds the sign-extended 12-bit immediate to rs1 (overflow ignored, low XLEN bits retained) and writes to rd. ADDI x0,x0,0 is the canonical NOP encoding. ADDI rd,x0,imm loads a small immediate (pseudo LI). ADDI rd,rs1,0 copies a register (pseudo MV).
Shows a conceptual execution flow: decode opcode/funct3/rd/rs1/imm from the 32-bit I-type encoding, read rs1, sign-extend the immediate, add, then write rd.
This example uses fixed initial register values; initial PC=0x00002000, and successful execution advances PC to 0x00002004.
The machine code is 0x06430293, split using the I-type field layout.
This animation shows ADDI ISA-visible decode and execution semantics, not any specific CPU pipeline, decode stage count, or timing.
ADDI adds a sign-extended 12-bit immediate to rs1 and writes rd. It is the common base form for small constants, stack adjustment, address offsets, and move-like pseudo-instructions.
These notes are checked against the RISC-V Unprivileged ISA manual and summarize operation semantics, immediate ranges, and edge behavior.
Integer addition keeps only the low XLEN bits of the result; arithmetic overflow does not raise an exception. Software must add explicit checks when overflow detection is required.
The RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture, version 20260120, §2.4 Integer Computational InstructionsADDI adds a sign-extended 12-bit immediate to rs1. The exact encodable range is -2048 through 2047; an out-of-range value cannot be encoded directly in one ADDI.
The RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture, version 20260120, §2.4 Integer Computational InstructionsRV32I/RV64I example: with a1=0x1000, addi a0, a1, 16 produces a0=0x1010; the addition itself does not access memory.
RV32I/RV64I example: with a1=0x1000, addi a0, a1, 16 produces a0=0x1010; the addition itself does not access memory.
RV32I/RV64I example: with a1=0x1000, addi a0, a1, 16 produces a0=0x1010; the addition itself does not access memory.
RV32I/RV64I example: with a1=0x1000, addi a0, a1, 16 produces a0=0x1010; the addition itself does not access memory.
ADDI uses a sign-extended 12-bit immediate with the exact encodable range -2048 through 2047. Values outside this range cannot be placed directly in this immediate field.
No separate SUBI exists in the base integer set. Subtract a small constant by using ADDI with a negative immediate.