How is SUB encoded differently from ADD?
They share opcode and funct3. SUB uses funct7=0100000, while ADD uses funct7=0000000.
SUB
RISC-V SUB Instruction Details
Instruction ManualR-typeSubtract rs2 from rs1, place result in rd
Instruction Syntax
sub rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
RV32IArithmetic
Instruction Behavior
SUB (R-type) subtracts rs2 from rs1 (overflow ignored), writing to rd. funct7=0100000, funct3=000. Bit30=1 in funct7 distinguishes SUB from ADD (same funct3/opcode). There is no SUBI; use ADDI with a negated immediate instead.
SUB Decode And Execute Animation
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
rs2
sub
,
,
Execution Context
t1(x6)
0x00000014
t2(x7)
0x00000007
31..25
24..20
19..15
14..12
11..7
6..0
0100000
funct7
00111
rs2
00110
rs1
000
funct3
00101
rd
0110011
opcode
Execution Data Path
instruction
0x407302B3
opcode
0110011 -> OP
funct3
000 -> SUB
funct7
0100000 -> base ALU selector
rd / rs1 / rs2
t0(x5) / t1(x6) / t2(x7)
ALU
0x00000014 - 0x00000007 = 0x0000000D
x5
t0(x5) = 0x0000000D
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x407302B3
syntax : sub t0(x5), t1(x6), t2(x7)
result : t0(x5) = 0x0000000D
Architectural Result
t0(x5) = 0x0000000D
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
SUB subtracts rs2 from rs1 and writes rd. It is register subtraction; the base integer ISA has no immediate subtract, so subtracting a small constant is normally ADDI with a negative immediate.
SUB shares opcode/funct3 with ADD and is distinguished by funct7=0100000.
Integer subtraction overflow does not raise an exception.
Common Usage Scenarios
Address & Pointer
Understand this scenario with real code like «sub x5, x6, x7 # x5 = x6 - x7».
Basic Arithmetic
Understand this scenario with real code like «sub x5, x6, x7 # x5 = x6 - x7».
Numerical Computing
Understand this scenario with real code like «sub x5, x6, x7 # x5 = x6 - x7».
Pre-Use Checklist
Syntax Check
- Verify rd, rs1, rs2 (and rs3) are valid GPRs.
- Confirm funct3 and funct7 encoding is correct.
Semantic Check
- Check if the result affects subsequent branches or address calculations.
- Ensure the rd register is not overwritten by another instruction.
Pitfalls / Common Confusions
Overflow silently ignored
No immediate subtraction; use ADDI with negated immediate
funct7 bit30=1 distinguishes SUB from ADD; wrong funct7 changes operation
FAQ
How do I subtract an immediate?
Use ADDI with a negative immediate, for example addi rd, rs1, -8 to subtract 8.