What value does SLT write?
It writes 1 when the comparison is true, otherwise 0.
SLT
RISC-V SLT Instruction Details
Instruction ManualR-typeSet rd to 1 if rs1 is less than rs2 (signed), else 0
Instruction Syntax
slt rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
RV32IRV64IArithmeticCompare
Instruction Behavior
SLT is an R-type instruction that compares rs1 and rs2 as signed integers, writing 1 to rd when rs1 < rs2 and 0 otherwise. opcode=0110011, funct7=0000000, funct3=010.
SLT Decode And Execute Animation
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
rs2
slt
,
,
Execution Context
a6(x16)
0xFFFFFFF0
sp(x2)
0x00000002
31..25
24..20
19..15
14..12
11..7
6..0
0000000
funct7
00010
rs2
10000
rs1
010
funct3
00101
rd
0110011
opcode
Execution Data Path
instruction
0x002822B3
opcode
0110011 -> OP
funct3
010 -> SLT
funct7
0000000 -> base ALU op
rd / rs1 / rs2
t0(x5) / a6(x16) / sp(x2)
ALU
signed: 0xFFFFFFF0 (-16) < 0x00000002 (2) -> 1
x5
t0(x5) = 0x00000001
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x002822B3
syntax : slt t0(x5), a6(x16), sp(x2)
result : t0(x5) = 0x00000001
Architectural Result
t0(x5) = 0x00000001
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
SLT performs signed comparison rs1 < rs2; rd is set to 1 when true and 0 otherwise. It turns a comparison result into an integer value usable by later arithmetic or branches.
The register form compares rs1 with rs2.
Signed and unsigned comparisons differ in how the bit patterns are interpreted, not in register width.
Common Usage Scenarios
Comparison & Detection
Understand this scenario with real code like «slt x5, x6, x7 # x5 = (x6 < x7) ? 1 : 0 (signed)».
Pre-Use Checklist
Syntax Check
- Verify rd, rs1, rs2 (and rs3) are valid GPRs.
- Confirm funct3 and funct7 encoding is correct.
Semantic Check
- Check if the result affects subsequent branches or address calculations.
- Ensure the rd register is not overwritten by another instruction.
Pitfalls / Common Confusions
Result is boolean (0 or 1), not the difference value
Use SLTU for unsigned comparison
FAQ
What is the difference between SLT and SLTU?
SLT/SLTI compare as signed integers; SLTU/SLTIU compare as unsigned integers.