What value does SLTU write?
It writes 1 when the comparison is true, otherwise 0.
SLTU
RISC-V SLTU Instruction Details
Instruction ManualR-typeSet rd to 1 if rs1 is less than rs2 (unsigned), else 0
Instruction Syntax
sltu rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
RV32IArithmeticCompare
Instruction Encoding
31..25
funct7
24..20
rs2
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode
SLTU uses opcode 0110011 (0x33), funct3 011, funct7 0000000. The rs1 and rs2 fields select the two source registers, and rd selects the destination register.
Format: R-type
opcode: 0110011 (0x33)
funct3: 011 (0x3)
funct7: 0000000 (0x00)
Instruction Behavior
SLTU compares rs1 and rs2 as unsigned integers, setting rd to 1 if rs1 < rs2, else 0. funct7=0000000, funct3=011. SLTU rd,x0,rs2 sets rd=1 if rs2 != 0 (pseudo SNEZ).
Quick Understanding & Search Notes
SLTU performs unsigned comparison rs1 < rs2; rd is set to 1 when true and 0 otherwise. It turns a comparison result into an integer value usable by later arithmetic or branches.
The register form compares rs1 with rs2.
Signed and unsigned comparisons differ in how the bit patterns are interpreted, not in register width.
Common Usage Scenarios
Comparison & Detection
Understand this scenario with real code like «sltu x5, x6, x7 # x5 = (x6 < x7) ? 1 : 0 (unsigned)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Use SLT for signed comparison
x0 as rs1 tests for rs2 != 0
FAQ
What is the difference between SLT and SLTU?
SLT/SLTI compare as signed integers; SLTU/SLTIU compare as unsigned integers.