What value does SLTU write?
It writes 1 when the comparison is true, otherwise 0.
SLTU
RISC-V SLTU Instruction Details
Instruction ManualR-typeSet rd to 1 if rs1 is less than rs2 (unsigned), else 0
Instruction Syntax
sltu rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
RV32IArithmeticCompare
Instruction Behavior
SLTU compares rs1 and rs2 as unsigned integers, setting rd to 1 if rs1 < rs2, else 0. funct7=0000000, funct3=011. SLTU rd,x0,rs2 sets rd=1 if rs2 != 0 (pseudo SNEZ).
SLTU Decode And Execute Animation
Uses the same rhythm as the ADDI page: machine-code fields, fixed-field identification, operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
rs2
sltu
,
,
Execution Context
31..25
24..20
19..15
14..12
11..7
6..0
0000000
funct7
01001
rs2
00100
rs1
011
funct3
00101
rd
0110011
opcode
Execution Data Path
instruction
0x009232B3
opcode
0110011 -> OP
funct3
011 -> SLTU
funct7
0000000 -> base ALU op
rd / rs1 / rs2
t0(x5) / tp(x4) / s1(x9)
immediate
not used
ALU
unsigned compare -> 1
x5
t0(x5) = 0x00000001
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x009232B3
syntax : sltu t0(x5), tp(x4), s1(x9)
result : t0(x5) = 0x00000001
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
SLTU performs unsigned comparison rs1 < rs2; rd is set to 1 when true and 0 otherwise. It turns a comparison result into an integer value usable by later arithmetic or branches.
The register form compares rs1 with rs2.
Signed and unsigned comparisons differ in how the bit patterns are interpreted, not in register width.
Common Usage Scenarios
Comparison & Detection
Understand this scenario with real code like «sltu x5, x6, x7 # x5 = (x6 < x7) ? 1 : 0 (unsigned)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Use SLT for signed comparison
x0 as rs1 tests for rs2 != 0
FAQ
What is the difference between SLT and SLTU?
SLT/SLTI compare as signed integers; SLTU/SLTIU compare as unsigned integers.