What value does SLTIU write?
It writes 1 when the comparison is true, otherwise 0.
SLTIU
RISC-V SLTIU Instruction Details
Instruction ManualI-typeSet rd to 1 if rs1 is less than the immediate (unsigned), else 0
Instruction Syntax
sltiu rd, rs1, imm
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
RV32IArithmeticCompare
Instruction Behavior
SLTIU compares rs1 (unsigned) with the immediate (sign-extended then treated as unsigned), setting rd to 1 if rs1 < imm, else 0. SLTIU rd,rs1,1 sets rd=1 if rs1==0 (pseudo SEQZ).
SLTIU Decode And Execute Animation
Uses the same rhythm as the ADDI page: machine-code fields, fixed-field identification, operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
imm
sltiu
,
,
Execution Context
31..20
19..15
14..12
11..7
6..0
000000001010
imm[11:0]
00100
rs1
011
funct3
00101
rd
0010011
opcode
Execution Data Path
instruction
0x00A23293
opcode
0010011 -> OP-IMM
funct3
011 -> SLTIU
rd / rs1
t0(x5) / tp(x4)
imm[11:0]
000000001010 -> 10
compare
unsigned compare -> 1
x5
t0(x5) = 0x00000001
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x00A23293
syntax : sltiu t0(x5), tp(x4), 10
result : t0(x5) = 0x00000001
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
SLTIU performs unsigned comparison rs1 < sign-extended imm; rd is set to 1 when true and 0 otherwise. It turns a comparison result into an integer value usable by later arithmetic or branches.
The immediate form uses a sign-extended 12-bit immediate.
Signed and unsigned comparisons differ in how the bit patterns are interpreted, not in register width.
Common Usage Scenarios
Comparison & Detection
Understand this scenario with real code like «sltiu x5, x6, 10 # x5 = (x6 < 10) ? 1 : 0 (unsigned)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Immediate is first sign-extended then treated as unsigned
vs SLTI: comparison type differs
FAQ
What is the difference between SLT and SLTU?
SLT/SLTI compare as signed integers; SLTU/SLTIU compare as unsigned integers.