Branch if rs1 is less than rs2 (signed comparison)
BLT compares rs1 and rs2 as signed integers and branches if rs1 < rs2 (even byte offsets from -4096 through 4094). BGT can be synthesized by swapping BLT operands. BGE is the inverse of BLT. An instruction-address-misaligned exception occurs only when the branch is taken and its target violates IALIGN.
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
This example uses fixed initial register values and PC=0x2000; instruction fetch succeeds, with no asynchronous interrupt or extra extension checks. Exception branches stop ordinary commit; post-trap PC and handler state are EEI-dependent.
The machine code is split by the current instruction format; the animation starts from encoding/decode.
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
BLT is a conditional branch: when rs1 and rs2 satisfy the signed less than condition, the PC branches to the current PC plus the B-type offset; otherwise execution falls through.
These notes are checked against the RISC-V Unprivileged ISA manual and summarize operation semantics, immediate ranges, and edge behavior.
Conditional branches use a signed B-type byte offset with implicit bit 0=0, encoding even values from -4096 through 4094; the target is the current branch PC plus that offset.
The RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture, version 20260120, §2.5 Control Transfer Instructions; §2.5.2 Conditional BranchesConditional branches only update the PC based on the comparison result. They do not write rd or save a return address; use JAL/JALR forms for calls and returns.
The RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture, version 20260120, §2.5 Control Transfer InstructionsUnderstand this scenario with real code like «blt x5, x6, loop # if x5 < x6 (signed), branch to loop».
B-type encodes even byte offsets from -4096 through 4094, added to the current branch PC. A taken target must also be a multiple of 4 for IALIGN=32; two-byte alignment suffices for IALIGN=16.
BLT/BGE compare as signed integers; BLTU/BGEU compare as unsigned integers. BEQ/BNE only test equality of the bit patterns.