not

RISC-V not Pseudo-Instruction Details

Assembler pseudo-instruction

RISC-V not pseudo-instruction expands to xori rd, rs, -1. XORI applies bitwise XOR with a sign-extended 12-bit immediate; -1 performs bitwise logical inversion and writes rd.

What You Write

not rd, rs

Typical Real Expansion

xori rd, rs, -1

What This Pseudo Instruction Is Saving You From Writing

More natural than xori rd, rs, -1. Exploits XOR with all-ones property — any bit XOR 1 flips — to concisely implement NOT.

not is assembler shorthand. Read its official xori rd, rs, -1 expansion and use the ISA definition of XORI for its behavior.

Official Semantics Checklist

The official assembly manual treats not as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.

The real semantics come from the ISA definitions of XORI and the other expanded instructions, not from a separate not hardware opcode.

How To Read The Expansion

Step 1

Assembler expands to xori rd, rs, -1.

Step 2

XORI uses a sign-extended 12-bit immediate; -1 extends to XLEN bits of ones.

Step 3

XORI XORs each bit of rs with 1, achieving bitwise inversion.

Assembly Forms And Real Instructions

The RISC-V Assembly Programmer's Manual gives the expansion xori rd, rs, -1.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual v0.0.1, Chapter 29 Table 5

RISC-V Unprivileged ISA Manual 20260120, Section 2.4.1

When To Think Of It First

Need the bitwise logical inversion of rs

Use the official assembly spelling not rd, rs

Pitfalls / Common Confusions

XORI sign-extends its 12-bit immediate to XLEN.

xori rd, rs, -1 performs bitwise logical inversion of rs.

FAQ

Is not a real RISC-V instruction?

not is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using not?

NOT acts on the whole register width (RV32=32 bits, RV64=64 bits), so match it to the intended data width