RVOPcode
Home/Pseudo / Assembly Forms/seqz
seqz

RISC-V seqz Pseudo-Instruction Details

Assembler pseudo-instruction

RISC-V seqz pseudo-instruction expands to sltiu rd, rs, 1. SLTIU is an unsigned comparison; this form writes 1 to rd only when rs is zero, otherwise 0.

What You Write
seqz rd, rs
Typical Real Expansion
sltiu rd, rs, 1

What This Pseudo Instruction Is Saving You From Writing

Directly expresses an equal-to-zero test: SLTIU uses unsigned comparison, so rs < 1 if and only if rs == 0. The result indicates whether rs equals zero.

seqz is assembler shorthand. Read its official sltiu rd, rs, 1 expansion and use the ISA definition of SLTIU for its behavior.

Official Semantics Checklist

The official assembly manual treats seqz as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.
The real semantics come from the ISA definitions of SLTIU and the other expanded instructions, not from a separate seqz hardware opcode.

How To Read The Expansion

Step 1
Assembler expands to sltiu rd, rs, 1.
Step 2
SLTIU performs unsigned comparison: if rs < 1 (i.e., rs == 0), rd = 1; else rd = 0.

Assembly Forms And Real Instructions

The RISC-V Assembly Programmer's Manual gives the expansion sltiu rd, rs, 1.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual v0.0.1, Chapter 29 Table 5
RISC-V Unprivileged ISA Manual 20260120, Section 2.4.1

When To Think Of It First

Need rd to be 1 when rs is zero and 0 otherwise
Use the official assembly spelling seqz rd, rs

Pitfalls / Common Confusions

seqz writes 1 to rd only when rs is zero; otherwise it writes 0.
SLTIU compares the sign-extended immediate as an unsigned value.

FAQ

Is seqz a real RISC-V instruction?

seqz is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using seqz?

seqz writes 1 to rd only when rs is zero; otherwise it writes 0.