ret

RISC-V ret Pseudo-Instruction Details

Assembler pseudo-instruction

Return from subroutine pseudo-instruction, expands to jalr x0, 0(ra). Jumps back to the caller indirectly via the ra register. The standard return mechanism in RISC-V function epilogues.

What You Write

ret

Typical Real Expansion

jalr x0, 0(ra)

What This Pseudo Instruction Is Saving You From Writing

The most common function-return JALR pattern (rd=x0, rs1=ra) is explicit with ret. Recognizing ret in disassembly aids control-flow understanding.

ret primarily means "Return to caller via ra". It is assembler-level shorthand; when debugging, auditing, or reading machine code, reason from the real expansion and relocation semantics listed on this page.

Official Semantics Checklist

The official assembly manual treats ret as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.

The real semantics come from the ISA definitions of JALR and the other expanded instructions, not from a separate ret hardware opcode.

How To Read The Expansion

Step 1

Assembler expands to jalr x0, 0(ra), equivalently jalr x0, 0(x1).

Step 2

JALR computes ra + 0 as the target address, writes PC+4 to x0 (discarded), completing only the jump.

Step 3

If the function created a stack frame, restore sp, ra, and callee-saved registers before ret.

What You May See In objdump / Disassembly

jalr x0, 0(ra) shown as ret in disassembly. Note: jr ra encodes identically, but ret semantically implies a function return.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual

RISC-V Unprivileged ISA Manual

When To Think Of It First

Return to caller at the end of a normal function

Jump back through ra after restoring callee-saved registers in epilogue

Non-leaf function return after restoring ra

Identify standard function boundaries when reading disassembly

Pitfalls / Common Confusions

ret depends on ra holding the correct return address — if the function overwrites ra, it must save/restore it on the stack first

Exception or interrupt returns use privileged SRET/MRET instructions, never ret

ret does not unwind the stack — sp adjustment (addi sp, sp, N) must occur before ret

FAQ

Is ret a real RISC-V instruction?

ret is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using ret?