RISC-V fsrm Pseudo-Instruction Details
Assembler pseudo-instructionfsrm uses CSRRW to write the low three bits of rs to frm. It reads and returns the old value only when rd is not x0; rd=x0 and the one-operand form do not read frm.
- fsrm rd, rs
- csrrw rd, frm, rs
- fsrm rs
- csrrw x0, frm, rs
What This Pseudo Instruction Is Saving You From Writing
fsrm rd, rs returns the old frm value when rd is not x0 and writes the low three bits of rs to frm. With rd=x0, including the one-operand form, frm is not read.
Availability And Extension Conditions
- Applies where the described fcsr and frm field are implemented.
How The Two Forms Differ
Assembly Forms And Real Instructions
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Pitfalls / Common Confusions
FAQ
Is fsrm a separate hardware opcode?
No. the RISC-V Assembly Programmer's Manual lists fsrm as an assembler pseudoinstruction; behavior comes from the listed CSR expansion.
What is the official fsrm expansion?
the RISC-V Assembly Programmer's Manual lists: csrrw rd, frm, rs; csrrw x0, frm, rs.
Does fsrm rd, rs read the old value when rd=x0?
No. With rd=x0, its CSRRW expansion does not read frm or cause CSR-read side effects, but still writes the low three bits of rs to frm. Only rd other than x0 receives the old value.