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rdtime

RISC-V rdtime Pseudo-Instruction Details

Assembler pseudo-instruction

Read-time-counter pseudo-instruction, expanding to csrrs rd, time, x0. It reads the low XLEN bits of the platform-provided real-time counter.

What You Write
rdtime rd
Typical Real Expansion
csrrs rd, time, x0

What This Pseudo Instruction Is Saving You From Writing

Counters are read-only CSRs; the pseudo-instruction hides the fixed CSRRS rd, csr, x0 form and makes performance/time reads clearer.

rdtime primarily means "Read low XLEN counter bits". It is assembler-level shorthand; when debugging, auditing, or reading machine code, reason from the real expansion and relocation semantics listed on this page.

Official Semantics Checklist

The official assembly manual treats rdtime as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.
The real semantics come from the ISA definitions of CSRRS and the other expanded instructions, not from a separate rdtime hardware opcode.
CSR read, write, set, clear, and immediate behavior follows the Zicsr CSRRW/CSRRS/CSRRC instructions and their immediate variants.

Availability And Extension Conditions

Base Conditions
  • Zicntr/time counter CSR semantics
  • Reads the low XLEN bits of time
Single-Instruction Or Standard Form
  • The target platform provides time and allows the current privilege level to read it
Fallback / Boundary
The availability and meaning of time are platform-defined; a full 64-bit RV32 read needs rdtimeh and rollover handling.
Notes
  • Do not equate time directly with CPU cycle count.

How To Read The Expansion

Step 1
CSRRS reads the time CSR; rs1=x0 leaves the counter unchanged.

What You May See In objdump / Disassembly

Disassembly may show rdcycle/rdtime/rdinstret or csrrs rd, csr, x0.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual
RISC-V Unprivileged ISA Manual

When To Think Of It First

Measure cycles or retired instructions for a short code region
Read a platform time base
Write benchmarks, runtime-library code, or low-level diagnostics

Pitfalls / Common Confusions

On RV32, reading a complete 64-bit counter usually needs the h-suffixed form and rollover handling
Whether lower privilege levels can read the counters depends on platform and CSR access control
In multicore or dynamic-frequency environments, cycle/time interpretation is platform-defined

FAQ

Is rdtime a real RISC-V instruction?

rdtime is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using rdtime?

On RV32, reading a complete 64-bit counter usually needs the h-suffixed form and rollover handling