rdtime
RISC-V rdtime Pseudo-Instruction Details
Assembler pseudo-instructionThe RISC-V rdtime pseudo-instruction expands to csrrs rd, time, x0 and reads the time CSR low XLEN bits.
What You Write
rdtime rd
Typical Real Expansion
csrrs rd, time, x0
What This Pseudo Instruction Is Saving You From Writing
The assembly manual names the CSRRS form for reading the real-time clock as rdtime.
The RISC-V rdtime pseudo-instruction expands to csrrs rd, time, x0 and reads the time CSR low XLEN bits.
Official Semantics Checklist
The rdtime expansion is csrrs rd, time, x0; this Zicntr counter read returns the time CSR low XLEN bits.
A complete RV32 read of the 64-bit time counter needs rdtimeh; that high-half form exists only when XLEN=32.
The h-suffixed form reads the high 32 bits only when XLEN=32.
Availability And Extension Conditions
Base Conditions
- Zicntr depends on Zicsr.
Notes
- A complete RV32 read of the 64-bit time counter needs rdtimeh; that high-half form exists only when XLEN=32.
How To Read The Expansion
Step 1
The rdtime expansion is csrrs rd, time, x0; this Zicntr counter read returns the time CSR low XLEN bits.
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Read the time CSR low XLEN bits.
Pitfalls / Common Confusions
A complete RV32 read of the 64-bit time counter needs rdtimeh; that high-half form exists only when XLEN=32.
FAQ
When is rdtime available?
A complete RV32 read of the 64-bit time counter needs rdtimeh; that high-half form exists only when XLEN=32.