rdtimeh
RISC-V rdtimeh Pseudo-Instruction Details
Assembler pseudo-instructionThe RISC-V rdtimeh pseudo-instruction expands to csrrs rd, timeh, x0 and, only on RV32, reads bits 63:32 of the time counter.
What You Write
rdtimeh rd
Typical Real Expansion
csrrs rd, timeh, x0
What This Pseudo Instruction Is Saving You From Writing
The assembly manual names the CSRRS form for reading the real-time clock as rdtime[h].
The RISC-V rdtimeh pseudo-instruction expands to csrrs rd, timeh, x0 and, only on RV32, reads bits 63:32 of the time counter.
Official Semantics Checklist
The rdtimeh expansion is csrrs rd, timeh, x0; on RV32 it reads the high 32 bits of time.
rdtimeh is present only when XLEN=32; do not treat it as an RV64 instruction.
The h-suffixed form reads the high 32 bits only when XLEN=32.
Availability And Extension Conditions
Base Conditions
- Zicntr depends on Zicsr.
Notes
- rdtimeh is present only when XLEN=32; do not treat it as an RV64 instruction.
How To Read The Expansion
Step 1
The rdtimeh expansion is csrrs rd, timeh, x0; on RV32 it reads the high 32 bits of time.
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Read the upper half of the 64-bit time counter on RV32.
Pitfalls / Common Confusions
rdtimeh is present only when XLEN=32; do not treat it as an RV64 instruction.
FAQ
When is rdtimeh available?
rdtimeh is present only when XLEN=32; do not treat it as an RV64 instruction.