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CSR Bit Fields

RISC-V dpc CSR Register

Address 0x7B1Privilege Debug mode onlyAccess RW / DXLEN (the widest XLEN supported by the hart)Debug, trace, and trigger CSRs

dpc at 0x7B1 is the Debug PC CSR, visible only in Debug mode.

Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Field Map

Understand dpc By Bit Fields

1 key fields
DXLEN-1:0

dpc

RW

Debug PC. On Debug Mode entry it holds a cause-specific virtual address (the EBREAK instruction's address for an EBREAK); resume loads the PC from it. Low-bit writability depends on IALIGN, and it must hold every valid virtual address.

dpc (bits DXLEN-1:0) — Debug PC. On Debug Mode entry it holds a cause-specific virtual address (the EBREAK instruction's address for an EBREAK); resume loads the PC from it. Low-bit writability depends on IALIGN, and it must hold every valid virtual address.

What This Field Controls

  • - Debug PC. On Debug Mode entry it holds a cause-specific virtual address (the EBREAK instruction's address for an EBREAK); resume loads the PC from it. Low-bit writability depends on IALIGN, and it must hold every valid virtual address.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual

What To Check First When Reading This CSR

  • - First confirm that the current hart and debug implementation provide dpc.
  • - dpc is in the 0x7B0-0x7BF Debug-mode-only CSR range; ordinary M-mode software must not treat it as a directly accessible Machine CSR.
  • - Access it only in Debug mode or in a context defined by the Debug Specification, and interpret fields according to the debug spec and implementation.

Risk Checks Before Writing

  • - Preserve bits that are not being changed so reserved or implementation-defined fields are not written with invalid values.
  • - Prefer CSRRS/CSRRC for local set/clear operations to avoid CSRRW overwriting concurrently updated status bits.

Put It Back Into A Real Flow

1

After entering Debug mode, read dpc according to the Debug Specification.

2

Modify only target debug fields and preserve unchanged or implementation-defined fields.

3

Validate the setting through resume, single-step, or debug-module behavior.