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CSR Bit Fields

RISC-V marchid CSR Register

Address 0xF12Privilege MachineAccess RO / XLENMachine implementation and hart identification CSRs

marchid (0xF12) is an MXLEN-bit read-only Machine CSR encoding the hart's base microarchitecture.

Related Search Terms
marchid CSRmarchid 0xF12machine architecture IDhart microarchitecture IDRISC-V marchidread only machine CSR
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
VALUE63:0RO
Field Map

Understand marchid By Bit Fields

1 key fields
XLEN-1:0

VALUE

RO

The complete MXLEN-bit machine architecture ID. RISC-V International globally allocates open-source project IDs with MSB zero; vendors allocate commercial IDs with MSB one and nonzero remaining MXLEN-1 bits.

VALUE (bits XLEN-1:0) — The complete MXLEN-bit machine architecture ID. RISC-V International globally allocates open-source project IDs with MSB zero; vendors allocate commercial IDs with MSB one and nonzero remaining MXLEN-1 bits.

What This Field Controls

  • - The complete MXLEN-bit machine architecture ID. RISC-V International globally allocates open-source project IDs with MSB zero; vendors allocate commercial IDs with MSB one and nonzero remaining MXLEN-1 bits.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

Official Basis & Search Notes

marchid (0xF12) is an MXLEN-bit read-only Machine CSR encoding the hart's base microarchitecture.

A value of zero can indicate the field is not implemented; the combination of mvendorid and marchid should uniquely identify the implemented hart microarchitecture type.
RISC-V Privileged Architecture ManualRISC-V Unprivileged ISA Manual

What To Check First When Reading This CSR

  • - This CSR must be readable in any implementation; its CSR address encoding requires Machine-mode access.

Risk Checks Before Writing

  • - This is a read-only CSR; do not write it.

Put It Back Into A Real Flow

1

Read this CSR in Machine mode.

2

Interpret the result using this page's fields and the applicable implementation or platform convention.