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CSR Bit Fields

RISC-V mvendorid CSR Register

Address 0xF11Privilege MachineAccess RO / 32Machine implementation and hart identification CSRs

mvendorid at 0xF11 is a 32-bit read-only Machine CSR providing the JEDEC manufacturer ID of the core provider.

Related Search Terms
mvendorid CSRmvendorid 0xF11JEDEC manufacturer IDmvendorid bank offsetmachine vendor IDRISC-V mvendorid
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Reserved63:32Bank31:7ROOffset6:0RO
Field Map

Understand mvendorid By Bit Fields

2 key fields
31:7

Bank

RO

Number of JEDEC manufacturer ID continuation codes; one less than the JEDEC bank number.

Bank (bits 31:7) — Number of JEDEC manufacturer ID continuation codes; one less than the JEDEC bank number.

What This Field Controls

  • - Number of JEDEC manufacturer ID continuation codes; one less than the JEDEC bank number.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
6:0

Offset

RO

The final non-0x7f JEDEC manufacturer ID byte with the most-significant odd-parity bit discarded.

Offset (bits 6:0) — The final non-0x7f JEDEC manufacturer ID byte with the most-significant odd-parity bit discarded.

What This Field Controls

  • - The final non-0x7f JEDEC manufacturer ID byte with the most-significant odd-parity bit discarded.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
Official Basis & Search Notes

mvendorid is a 32-bit read-only Machine CSR that encodes the JEDEC manufacturer ID in Bank and Offset fields. It is not an XLEN-wide generic status register.

mvendorid address and access class are checked against the official CSR table: 0xF11, Machine, RO.
The official Machine chapter defines mvendorid as a 32-bit read-only CSR providing a JEDEC manufacturer ID.
The Bank field encodes the number of continuation codes; the Offset field encodes the final manufacturer ID byte after discarding the odd-parity bit.
RISC-V Privileged Architecture ManualRISC-V Unprivileged ISA Manual

What To Check First When Reading This CSR

  • - First confirm that the current hart implements mvendorid; unimplemented or insufficiently privileged accesses raise an illegal-instruction exception.
  • - Use address 0xF11 and the lowest access privilege (Machine) to decide whether software may read it directly.
  • - Do not assume fixed values for reserved, WARL, or WLRL bits; interpret the value according to the specification and implementation.

Risk Checks Before Writing

  • - mvendorid is a read-only CSR; writes raise an illegal-instruction exception or are disallowed by the implementation.

Put It Back Into A Real Flow

1

Read mvendorid to obtain hardware or runtime state.

2

Interpret the returned value according to the field descriptions and do not attempt to write it back.

3

If reading fails at the current privilege level, handle the illegal-instruction exception path.

FAQ

Can mvendorid be accessed from any privilege level?

Do not decide from the CSR name alone. The official CSR address encoding and tables define the lowest access privilege; this entry records mvendorid as Machine. Access with insufficient privilege or to an unimplemented CSR raises an illegal-instruction exception.

What is easiest to miss when using mvendorid?

mvendorid is read-only. Treat it as an observation point, do not try to write it, and do not depend on fixed values for reserved or WPRI fields.