CSR Bit Fields

RISC-V pmpaddr5 CSR Register

Address 0x3B5Privilege MachineAccess RW / XLENMachine physical memory protection CSRs

pmpaddr5 is a PMP address CSR holding address-matching information for a physical memory protection entry.

Field Map

Understand pmpaddr5 By Bit Fields

1 key fields
XLEN-1:0

ADDR

RW

PMP address encoding; interpretation depends on the A field in the corresponding pmpcfg entry.

ADDR (bits XLEN-1:0) — PMP address encoding; interpretation depends on the A field in the corresponding pmpcfg entry.

What This Field Controls

  • - PMP address encoding; interpretation depends on the A field in the corresponding pmpcfg entry.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

Open Official Manual
Official Basis & Search Notes

pmpaddr5 is a RW CSR in machine physical memory protection csrs at 0x3B5. Check privilege and implemented extensions before interpreting its bit fields.

pmpaddr5 address, lowest access privilege, and access class are checked against the official CSR table: 0x3B5, Machine, RW.
pmpaddr5 belongs to the physical-memory-protection path; read it with adjacent pmpcfg/pmpaddr entries rather than as an isolated field.
Modify only target fields and preserve unchanged bits; interpret WPRI and reserved fields only as the official specification and implementation define them.

What To Check First When Reading This CSR

  • - First confirm that the current hart implements pmpaddr5; unimplemented or insufficiently privileged accesses raise an illegal-instruction exception.
  • - Use address 0x3B5 and the lowest access privilege (Machine) to decide whether software may read it directly.
  • - Do not assume fixed values for reserved, WARL, or WLRL bits; interpret the value according to the specification and implementation.

Risk Checks Before Writing

  • - Preserve bits that are not being changed so reserved or implementation-defined fields are not written with invalid values.
  • - Prefer CSRRS/CSRRC for local set/clear operations to avoid CSRRW overwriting concurrently updated status bits.

Put It Back Into A Real Flow

1

During initialization or the relevant privileged flow, software reads pmpaddr5 to observe the current state.

2

Modify only the target fields while preserving all other bits.

3

Read back the CSR or validate through later trap, interrupt, or context-switch behavior that the setting took effect.

FAQ

Can pmpaddr5 be accessed from any privilege level?

Do not decide from the CSR name alone. The official CSR address encoding and tables define the lowest access privilege; this entry records pmpaddr5 as Machine. Access with insufficient privilege or to an unimplemented CSR raises an illegal-instruction exception.

What is easiest to miss when writing pmpaddr5?

Do not overwrite the whole CSR as if it were an ordinary integer. Modify only target fields, preserve unchanged bits, and follow the specification for WARL, WLRL, WPRI, or reserved fields.