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CSR Bit Fields

RISC-V satp CSR Register

Address 0x180Privilege SupervisorAccess RW / XLENSupervisor address-translation and memory-protection CSRs

Supervisor address translation and protection register; controls the virtual memory paging scheme for S-mode.

Related Search Terms
satp CSRsatp 0x180satp MODE ASID PPNRISC-V page tablesupervisor address translationSv39 satp
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
MODE63:60RWASID59:44RWPPN43:0RW
Field Map

Understand satp By Bit Fields

3 key fields
63:60

MODE

RW

RV64 address-translation mode: 0=Bare, 8=Sv39, 9=Sv48, 10=Sv57. RV32 uses MODE at bit 31.

MODE (bits 63:60) — RV64 address-translation mode: 0=Bare, 8=Sv39, 9=Sv48, 10=Sv57. RV32 uses MODE at bit 31.

What This Field Controls

  • - RV64 address-translation mode: 0=Bare, 8=Sv39, 9=Sv48, 10=Sv57. RV32 uses MODE at bit 31.

Common Values

0Bare

No paged address translation; when selecting Bare, the remaining fields must be written as zero.

1-7Reserved

Reserved encodings for RV64 satp.MODE; portable software must not write or depend on them.

8Sv39

Enables Sv39 paged virtual memory.

9Sv48

Enables Sv48 paged virtual memory.

10Sv57

Enables Sv57 paged virtual memory.

11Reserved / Sv64 future

Reserved in this version for a future Sv64 scheme.

12-15Reserved

Reserved encodings for RV64 satp.MODE; portable software must not write or depend on them.

59:44

ASID

RW

Address-space identifier used to reduce TLB flush scope.

ASID (bits 59:44) — Address-space identifier used to reduce TLB flush scope.

What This Field Controls

  • - Address-space identifier used to reduce TLB flush scope.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

43:0

PPN

RW

Physical page number of the root page table.

PPN (bits 43:0) — Physical page number of the root page table.

What This Field Controls

  • - Physical page number of the root page table.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

Official Basis & Search Notes

satp is a RW CSR in supervisor address-translation and memory-protection csrs at 0x180. Check privilege and implemented extensions before interpreting its bit fields.

satp address, lowest access privilege, and access class are checked against the official CSR table: 0x180, Supervisor, RW.
Read it as part of supervisor address-translation and memory-protection csrs before interpreting the bit-field table on this page.
Modify only target fields and preserve unchanged bits; interpret WPRI and reserved fields only as the official specification and implementation define them.
RISC-V Privileged Architecture ManualRISC-V Unprivileged ISA Manual

What To Check First When Reading This CSR

  • - First confirm that the current hart implements satp; unimplemented or insufficiently privileged accesses raise an illegal-instruction exception.
  • - Use address 0x180 and the lowest access privilege (Supervisor) to decide whether software may read it directly.
  • - Do not assume fixed values for reserved, WARL, or WLRL bits; interpret the value according to the specification and implementation.

Risk Checks Before Writing

  • - Preserve bits that are not being changed so reserved or implementation-defined fields are not written with invalid values.
  • - Prefer CSRRS/CSRRC for local set/clear operations to avoid CSRRW overwriting concurrently updated status bits.

Put It Back Into A Real Flow

1

During initialization or the relevant privileged flow, software reads satp to observe the current state.

2

Modify only the target fields while preserving all other bits.

3

Read back the CSR or validate through later trap, interrupt, or context-switch behavior that the setting took effect.

FAQ

Can satp be accessed from any privilege level?

Do not decide from the CSR name alone. The official CSR address encoding and tables define the lowest access privilege; this entry records satp as Supervisor. Access with insufficient privilege or to an unimplemented CSR raises an illegal-instruction exception.

What is easiest to miss when writing satp?

Do not overwrite the whole CSR as if it were an ordinary integer. Modify only target fields, preserve unchanged bits, and follow the specification for WARL, WLRL, WPRI, or reserved fields.