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CSR Bit Fields

RISC-V sctrctl CSR Register

Address 0x14EPrivilege SupervisorAccess RW / 64 (RV32 explicit access reaches only low 32 bits)Supervisor AIA, timer, and indirect interrupt CSRs

sctrctl (0x14E) is the Supervisor Control Transfer Records control CSR, providing S-mode access to a subset of the 64-bit mctrctl; RV32 cannot access xctrctl[63:32].

Related Search Terms
sctrctl CSRsctrctl 0x14E64-bit CTR controlSmctrmctrctl subsetRV32 xctrctl
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
SCTRCTL_FIELDS63:0RW / per field
Field Map

Understand sctrctl By Bit Fields

3 key fields
9

MTE

RO 0

mctrctl.MTE is not accessible through sctrctl; sctrctl bit 9 reads as 0.

MTE (bit 9) — mctrctl.MTE is not accessible through sctrctl; sctrctl bit 9 reads as 0.

What This Field Controls

  • - mctrctl.MTE is not accessible through sctrctl; sctrctl bit 9 reads as 0.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
2

M

RO 0

mctrctl.M is not accessible through sctrctl; sctrctl bit 2 reads as 0.

M (bit 2) — mctrctl.M is not accessible through sctrctl; sctrctl bit 2 reads as 0.

What This Field Controls

  • - mctrctl.M is not accessible through sctrctl; sctrctl bit 2 reads as 0.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
63:0

SCTRCTL_FIELDS

RW / per field

Except for M and MTE, other mctrctl fields are accessible through sctrctl; RV32 cannot explicitly access xctrctl[63:32], and a future extension may add high-half CSRs.

SCTRCTL_FIELDS (bits 63:0) — Except for M and MTE, other mctrctl fields are accessible through sctrctl; RV32 cannot explicitly access xctrctl[63:32], and a future extension may add high-half CSRs.

What This Field Controls

  • - Except for M and MTE, other mctrctl fields are accessible through sctrctl; RV32 cannot explicitly access xctrctl[63:32], and a future extension may add high-half CSRs.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
Official Basis & Search Notes

sctrctl controls supervisor-side CTR recording policy, but it is not a full mctrctl mirror: M and MTE are inaccessible through sctrctl, and RV32 cannot explicitly access xctrctl[63:32].

Smctr defines mctrctl as a 64-bit register and sctrctl as S-mode access to a subset of mctrctl.
Bits 2 and 9 are read-only zero, so M and MTE are not accessible through sctrctl.
Smctr explicitly says RV32 cannot access xctrctl[63:32]; a future extension may add sctrctlh.
RISC-V Privileged Architecture Manual - CSR tableRISC-V Privileged Architecture Manual - SmctrRISC-V Privileged Architecture Manual

What To Check First When Reading This CSR

  • - First confirm that the hart implements Smctr/Ssctr; unimplemented or insufficiently privileged CSR accesses raise an illegal-instruction exception.
  • - sctrctl provides S-mode access to a subset of the 64-bit mctrctl; RV32 can explicitly access only the low 32 bits.
  • - Do not assume fixed values for reserved, WPRI, WARL, or unimplemented fields; interpret them according to the specification and implementation.

Risk Checks Before Writing

  • - The M and MTE bits in sctrctl are read-only zero; do not use it to configure Machine-mode CTR enable or M-mode trap recording.
  • - RV32 cannot explicitly access xctrctl[63:32]; do not make those upper-bit settings a portable dependency.
  • - Modify only officially defined target fields and preserve unchanged plus WPRI/reserved fields.

Put It Back Into A Real Flow

1

Confirm Smctr/Ssctr is implemented and decide which control-transfer types should be recorded.

2

Use sctrctl to configure S/U-related recording, filtering, and freeze policy; do not try to access M, MTE, or RV32-inaccessible xctrctl[63:32] through it.

3

Use it together with sctrstatus and sctrdepth when reading or maintaining the CTR buffer.

FAQ

Is sctrctl an AIA interrupt CSR?

No. It belongs to Control Transfer Records (Smctr/Ssctr), controlling control-transfer recording.

Can RV32 access all 64 control bits through sctrctl?

No. Smctr explicitly says RV32 cannot access xctrctl[63:32]; there is currently no sctrctlh.