CSR Bit Fields

RISC-V time CSR Register

Address 0xC01Privilege UserAccess RO / XLEN bits (64-bit underlying counter)User counters and performance-monitoring CSRs

time is a Zicntr user-level read-only CSR that reads the low XLEN bits of wall-clock real time elapsed from an arbitrary point in the past. Zicntr depends on Zicsr; the underlying counter is 64 bits, and RV32 uses timeh to read bits 63:32.

Field Map

Understand time By Bit Fields

1 key fields
XLEN-1:0

VALUE

RO

Read-only low XLEN-bit view of time; the underlying counter is 64 bits. On RV32, timeh reads bits 63:32.

VALUE (bits XLEN-1:0) — Read-only low XLEN-bit view of time; the underlying counter is 64 bits. On RV32, timeh reads bits 63:32.

What This Field Controls

  • - Read-only low XLEN-bit view of time; the underlying counter is 64 bits. On RV32, timeh reads bits 63:32.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

Official Basis & Search Notes

time is the Zicntr user-level read-only CSR at 0xC01, reading the low XLEN bits of a 64-bit underlying counter.

Zicntr depends on Zicsr; on RV32 the companion high-half CSR reads bits 63:32.
time increments once per real-time clock tick; the execution environment should provide a means to determine the tick period and clock accuracy. When V=1, a VS/VU read of time returns htimedelta plus the actual time value.
Read access in U-mode and virtualized execution is controlled by the TM bits in mcounteren, scounteren, and hcounteren.

What To Check First When Reading This CSR

  • - time is the low XLEN-bit view of a Zicntr read-only 64-bit counter; RV32 uses timeh to read bits 63:32.
  • - time increments once per real-time clock tick; the execution environment should provide a means to determine the tick period and clock accuracy. When V=1, a VS/VU read of time returns htimedelta plus the actual time value.
  • - On privileged implementations with S-mode, U-mode reads require the TM bits in both mcounteren and scounteren; without S-mode, mcounteren controls U-mode access. When V=1, access is also subject to mcounteren and hcounteren; VU-mode also requires scounteren.

Risk Checks Before Writing

  • - time is read-only; writing a read-only CSR raises an illegal-instruction exception.

Put It Back Into A Real Flow

1

Read the low XLEN bits of time.

2

On RV32, use timeh with it to read a 64-bit value.

3

Interpret the result using the execution environment counter definition, rate, and access controls.