How do I tell whether AMOCAS.B succeeded?
Compare the old value returned in rd with the expected value; equality indicates that the swap store occurred.
AMOCAS.B
RISC-V AMOCAS.B Instruction Details
Instruction ManualR-typeAtomic compare-and-swap byte: compare memory with rd[7:0], store rs2[7:0] on match, return old value in rd
Instruction Syntax
amocas.b rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
ZabhaZacasAtomic Operation
Instruction Behavior
AMOCAS.B (the byte AMOCAS form provided by Zabha, with Zacas CAS semantics) atomically loads a 8-bit value from the address in rs1 and compares it with the low 8 bits of rd; on a bitwise match it stores the low 8 bits of rs2 back to the same address. The loaded old value is sign-extended to XLEN and written to rd regardless of success. aq/rl ordering bits are supported.
AMOCAS.B Atomic Decode And Execute Animation
Shows Zabha + Zacas byte atomic field decode, aq/rl ordering bits, memory read, and CAS state update.
rd
rs2
rs1
amocas.b,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
00101
funct5
1
aq
0
rl
01011
rs2
01010
rs1
000
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x2CB502AF
opcode
0101111 -> AMO
funct3
000 -> byte width
funct5
00101 -> AMOCAS.B
aq / rl
1/0 -> acquire
rd / rs2 / rs1
t0(x5) compare=0xF2 / a1(x11) swap=0x7F / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old byte 0xF2
RMW
0xF2 == 0xF2 -> store 0x7F
rd / memory
t0(x5) = 0xFFFFFFF2; mem[0x00001000] = 0x7F
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
Zabha + Zacas-extension byte atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x2CB502AF
syntax : amocas.b t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xFFFFFFF2; mem[0x00001000] = 0x7F
8-bit Byte Result View
7
6
5
4
3
2
1
0
1
1
1
1
0
0
1
0
old byte
1
1
1
1
0
0
1
0
rd compare
0
1
1
1
1
1
1
1
rs2 swap
CAS match
CAS match
CAS match
CAS match
CAS match
CAS match
CAS match
CAS match
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-
-
-
-
-
-
-
This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.
Quick Understanding & Search Notes
AMOCAS.B atomically loads a 8-bit memory value, compares it bitwise with the compare value supplied in rd, stores the rs2 swap value on equality, and always writes the old memory value back to rd.
Before execution rd supplies the compare value; after execution rd is overwritten by the old memory value, not a Boolean success flag.
AMOCAS.B comes from the combination of Zacas and Zabha; upper compare/swap input bits are ignored under Zabha subword rules.
The address must be naturally aligned to the operand size; aq/rl ordering on success and failure follows the Zacas rules.
Common Usage Scenarios
Atomic & Sync
Understand this scenario with real code like «amocas.b a0, a2, (a1)».
Network & Byte Order
Understand this scenario with real code like «amocas.b a0, a2, (a1)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
The compare value is the input value in rd; rd is also overwritten with the old memory value and is not a Boolean success flag.
The swap value comes from the low bits of rs2; the width is selected by the .b/.h/.w/.d/.q suffix.
The target address must be naturally aligned to the operand width unless relaxed by the platform misaligned atomicity granule PMA.
FAQ
Does AMOCAS.B take the compare value from rs2?
No. rs2 supplies the new value to store on success; the compare value comes from rd before execution, or from the rd register pair.