How do I tell whether AMOCAS.Q succeeded?
Compare the old value returned in rd with the expected value; equality indicates that the swap store occurred.
AMOCAS.Q
RISC-V AMOCAS.Q Instruction Details
Instruction ManualR-typeRV64 atomic compare-and-swap quadword: compare 128-bit rd/rd+1, store rs2/rs2+1 on match, return old value in rd/rd+1
Instruction Syntax
amocas.q rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
ZacasAtomic Operation
Instruction Behavior
AMOCAS.Q (Zacas extension) is defined only for RV64. It atomically loads a 128-bit quadword from the address in rs1 and bitwise-compares it with the 128-bit compare value in the even rd/rd+1 pair; on a match it stores the 128-bit swap value from the even rs2/rs2+1 pair. The old memory value is written back to rd/rd+1. rd and rs2 must be even; odd encodings are reserved. aq/rl ordering bits are supported.
Quick Understanding & Search Notes
AMOCAS.Q atomically loads a 128-bit memory value, compares it bitwise with the compare value supplied in rd, stores the rs2 swap value on equality, and always writes the old memory value back to rd.
Before execution rd supplies the compare value; after execution rd is overwritten by the old memory value, not a Boolean success flag.
AMOCAS.Q is the RV64-only 128-bit CAS form and uses even-numbered rd/rs2 register pairs.
The address must be naturally aligned to the operand size; aq/rl ordering on success and failure follows the Zacas rules.
Common Usage Scenarios
Atomic & Sync
Understand this scenario with real code like «amocas.q a0, a2, (a1)».
Network & Byte Order
Understand this scenario with real code like «amocas.q a0, a2, (a1)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
AMOCAS.Q is an RV64-only 128-bit CAS, not an RV128 instruction.
The compare value comes from rd/rd+1; rs2/rs2+1 is the new value stored on success.
rd and rs2 must be even; the target address must be naturally 16-byte aligned unless relaxed by PMA.
FAQ
Does AMOCAS.Q take the compare value from rs2?
No. rs2 supplies the new value to store on success; the compare value comes from rd before execution, or from the rd register pair.