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C.ANDI

RISC-V C.ANDI Instruction Details

Instruction ManualCB-format

Bitwise AND of rd' with sign-extended 6-bit imm. CB format.

Instruction Syntax

c.andi rd', imm
Operand Breakdown
This is a CB-format-format instruction. Confirm operand positions based on the assembly syntax.
CCompressed Instruction
Related Search Terms
c.andi instructionc.andi syntaxc.andi sign-extended immediatec.andi rd registercompressed AND immediate

Instruction Behavior

c.andi ANDs rd' with a sign-extended 6-bit immediate and writes rd'.

C.ANDI Decode & Execute Animation

Shows only manual-defined 16-bit fields, operands, and ISA-visible results; it does not model a pipeline, cache, timing, or an implementation's memory-fault handling.

c.andi,
Execution context
x8 = 0x0000000000001234; imm = -16 -> 0x0000000000001234 AND sext(imm[5:0]=-16) = 0x0000000000001230 -> x8 = 0x0000000000001230
16-bit encoding fields
15..13
funct3
100
12
imm[5]
1
11..10
funct2
10
9..7
rd'/rs1'
000
6..2
imm[4:0]
10000
1..0
op
01
Execution data path
x8 = 0x0000000000001234; imm = -16
0x0000000000001234 AND sext(imm[5:0]=-16) = 0x0000000000001230
x8 <- 0x0000000000001230
Architectural state has not been committed.

Quick Understanding & Search Notes

c.andi ANDs rd' with a sign-extended 6-bit immediate and writes rd'.

Compressed instructions usually mirror a 32-bit base instruction semantic, but with register-subset, immediate-encoding, or XLEN restrictions.
The immediate is sign-extended, not zero-extended.
rd' uses the compressed register subset x8..x15.
RISC-V Unprivileged ISA Manual, C compressed extension

Common Usage Scenarios

Bit Operations & Masks

Understand this scenario with real code like «c.andi x8, 0xF # x8 &= 0xF».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is CB-format.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

The immediate is sign-extended, not zero-extended.
rd' uses the compressed register subset x8..x15.

FAQ

Why does c.andi have register restrictions?

Many C formats encode registers with shorter fields, so some forms can access only x8..x15 or fixed registers.

Is c.andi just an assembler pseudo-instruction?

No. It is a 16-bit encoded instruction defined by the C extension.