What is the 32-bit operation?
It expands to sub rd', rd', rs2', writing back to rd'.
C.SUB
RISC-V C.SUB Instruction Details
Instruction ManualC-typeSubtract rs2' from rd', write to rd'. CA format.
Instruction Syntax
c.sub rd', rs2'
Operand Breakdown
RV32/RV64 C or Zca; 16-bit CA format, with no immediate.
Three-bit rd'/rs1' and rs2' both select x8-x15; rd' is read and written.
Compute rd'-rs2', retaining low XLEN bits and ignoring overflow.
Identical fields read the same old value, producing zero.
CCompressed Instruction
Extension condition: RV32/RV64; requires C or Zca.
Instruction Behavior
C.SUB (CA format, x8-x15 only) computes subtraction of rd' and rs2', writes to rd'. Expands to sub rd',rd',rs2'.
C.SUB Decode & Execute Animation
Shows only official 16-bit fields, conditions, and architectural state; it does not model a pipeline, cache, or timing.
c.sub,
Execution context
RV32/RV64; requires C or Zca; overlapping operands read the same old value.
x10 <- 0x0000FE1F
16-bit encoding fields
15..10
funct6
100011
9..7
rd'/rs1'
010
6..5
funct2
00
4..2
rs2'
011
1..0
op
01
Execution data path
CA fields restore rd'/rs1' to x10 and rs2' to x11; both three-bit fields map to x8-x15.
0x0000FF0F - 0x000000F0 = 0x0000FE1F (mod 2^32)
x10 <- 0x0000FE1F
Architectural state has not been committed.
Quick Understanding & Search Notes
C.SUB subtracts rs2' from rd' and writes rd'. Both CA compact-register fields select only x8-x15.
The CA rd'/rs1' and rs2' fields are three bits each and map to x8-x15.
C.SUB is an XLEN-bit subtraction, without an immediate or the RV64 word sign-extension semantics.
Common Usage Scenarios
Integer Subtraction
RV32 C/Zca, x8=0 and x9=1: c.sub x8, x9 yields x8=0xffffffff, ignoring overflow.
Pre-Use Checklist
Syntax Check
- RV32/RV64 C or Zca; 16-bit CA format, with no immediate.
- Three-bit rd'/rs1' and rs2' both select x8-x15; rd' is read and written.
Semantic Check
- Compute rd'-rs2', retaining low XLEN bits and ignoring overflow.
- Identical fields read the same old value, producing zero.
Pitfalls / Common Confusions
Only x8-x15 registers (CA format, 3-bit register fields)
There is no immediate operand; rd' is both the read left operand and the writeback destination
FAQ
Can both operands select one register?
Yes. They read the same old value, producing zero; both fields select only x8-x15.