C.J

RISC-V C.J Instruction Details

Instruction ManualC-type

16-bit CJ jump: add a signed even byte offset to PC, without saving a return address.

Instruction Syntax

c.j offset
Operand Breakdown
C.J uses the 16-bit CJ format with no explicit register operand; it corresponds to jal x0, offset.
offset is an even byte displacement relative to the current instruction PC, from -2048 through 2046; zero is legal.
Add the sign-extended offset to PC without writing a link register.
CCompressed Instruction

Extension condition: RV32C / RV64C; this page describes C extension version 2.0.

Instruction Behavior

C.J uses the 16-bit CJ format to jump unconditionally to the current instruction PC plus a sign-extended offset. The byte offset is even, from -2048 through 2046; zero is legal. It corresponds to jal x0, offset and saves no return address.

C.J Instruction Animation

Three learning stages illustrate architectural rules, without modeling processor pipelines or cycles.

c.j
Execution context

RV32C / RV64C; C sets IALIGN=16, so PC is an even byte address. Address arithmetic wraps at XLEN. Subsequent target instruction-fetch exceptions are outside this model.

c.j → PC ← 0x00001020; no link register write

16-bit encoding fields

0xA005

15..13
funct3
101
12
offset[11]
0
11
offset[4]
0
10..9
offset[9:8]
00
8
offset[10]
0
7
offset[6]
0
6
offset[7]
0
5..3
offset[3:1]
000
2
offset[5]
1
1..0
op
01
Operands and calculation
Restore compressed operands
rd=x0; offset[11]=0; offset[4]=0; offset[9:8]=00; offset[10]=0; offset[6]=0; offset[7]=0; offset[3:1]=000; offset[5]=1; imm=000000100000; sext(000000100000) = 32 B; imm[0]=0; input offset is already in bytes, with no additional scaling.
Calculate
Not computed
Commit result
Pending commit
Architectural result

Architectural result not committed yet.

Quick Understanding & Search Notes

C.J uses CJ format to update PC unconditionally by a sign-extended offset in 2-byte multiples, without writing a link register.

The offset range is -2048 through 2046 bytes.
A zero C.J offset is legal, not reserved.

Common Usage Scenarios

Branch & Jump

Understand this scenario with real code like «c.j 128 # PC=0x1000 -> PC=0x1080; no link write».

Loops & Iteration

Understand this scenario with real code like «c.j 128 # PC=0x1000 -> PC=0x1080; no link write».

Pre-Use Checklist

Syntax Check
  • Confirm RV32C / RV64C and the 16-bit encoding conditions.
  • C.J uses the 16-bit CJ format with no explicit register operand; it corresponds to jal x0, offset.
Semantic Check
  • offset is an even byte displacement relative to the current instruction PC, from -2048 through 2046; zero is legal.
  • Add the sign-extended offset to PC without writing a link register.

Pitfalls / Common Confusions

The byte offset must be even, from -2048 through 2046; bit 0 is implicit zero.
Does not save return address
An offset of 0 is still legal and updates PC to the current instruction address

FAQ

Does C.J save a return address?

No; it corresponds to jal x0, offset.