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C.J

RISC-V C.J Instruction Details

Instruction ManualC-type

Unconditional jump (±2KiB). CJ format.

Instruction Syntax

c.j offset
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
CCompressed Instruction
Related Search Terms
C.J instructionRISC-V C.Jc.j syntaxc.j encodingc.j C-typec.j compressed instructionc.j jump

Instruction Behavior

C.J (CJ format) performs unconditional jump. Sign-extended offset added to pc, ±2 KiB range. Expands to jal x0,offset.

C.J Decode & Execute Animation

This interactive model shows only architectural decode, operands, and state changes, not a pipeline, cache, or timing model.

c.j
Execution context
Encoding fields
15..13
funct3
101
12
offset[11]
0
11
offset[4]
0
10..9
offset[9:8]
00
8
offset[10]
0
7
offset[6]
0
6
offset[7]
0
5..3
offset[3:1]
000
2
offset[5]
1
1..0
op
01
Execution data path
Decode
CJ: permuted offset
Operands
PC = 0x00001000
Execute
PC + 32 = 0x00001020
State
PC <- 0x00001020

PC updates unconditionally; no link register is written.

Architectural result

Awaiting state update: the highlighted fields and calculation above show the current step; no architectural result has been committed yet.

Quick Understanding & Search Notes

C.J uses CJ format to update PC unconditionally by a sign-extended offset in 2-byte multiples, without writing a link register.

The offset range is -2048 through 2046 bytes.
A zero C.J offset is legal, not reserved.
RISC-V Unprivileged ISA Manual: C extension control transfers

Common Usage Scenarios

Branch & Jump

Understand this scenario with real code like «c.j 128 # jump to pc+128».

Loops & Iteration

Understand this scenario with real code like «c.j 128 # jump to pc+128».

Pre-Use Checklist

Syntax Check
  • Verify the 16-bit compressed encoding is only available on CPUs supporting the C extension.
  • Confirm rd/rs1'/rs2' fields map to x8–x15.
Semantic Check
  • Note the limited operand space of compressed instructions.
  • Verify this compressed instruction has a corresponding 32-bit expansion.

Pitfalls / Common Confusions

Jump range only ±2 KiB (32-bit JAL is ±1 MiB)
Does not save return address
An offset of 0 is still legal and updates PC to the current instruction address

FAQ

Does C.J save a return address?

No; it corresponds to jal x0, offset.