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C.JAL

RISC-V C.JAL Instruction Details

Instruction ManualCJ format

Unconditional jump; write pc+2 as the return address to x1. CJ format, RV32C-only.

Instruction Syntax

c.jal offset
Operand Breakdown
This is a CJ format-format instruction. Confirm operand positions based on the assembly syntax.
CCompressed Instruction
Related Search Terms
c.jal instructionc.jal syntaxRV32C c.jalc.jal ra linkc.jal offset

Instruction Behavior

c.jal is an RV32C-only CJ-format instruction: it adds the sign-extended, 2-byte-aligned PC-relative offset to pc and writes pc+2 to x1/ra.

C.JAL Decode & Execute Animation

Shows only manual-defined compressed fields, operands, and architectural state; it does not model a pipeline, cache, or timing.

Execution context (RV32)
PC 0x00001000 -> 0x00001100; x1/ra <- 0x00001002
16-bit encoding fields
15..13
funct3
001
12
offset[11]
0
11
offset[4]
0
10..9
offset[9:8]
01
8
offset[10]
0
7
offset[6]
0
6
offset[7]
0
5..3
offset[3:1]
000
2
offset[5]
0
1..0
op
01
Current calculation

CJ imm[11|4|9:8|10|6|7|3:1|5] -> offset

The commit step reveals the architectural result.

Quick Understanding & Search Notes

c.jal is an RV32C-only CJ-format instruction: it adds the sign-extended, 2-byte-aligned PC-relative offset to pc and writes pc+2 to x1/ra.

Compressed instructions usually mirror a 32-bit base instruction semantic, but with register-subset, immediate-encoding, or XLEN restrictions.
C.JAL is defined only for RV32C; RV64C uses that encoding space for C.ADDIW.
The link register is fixed to x1/ra, unlike JAL where rd is selectable.
RISC-V Unprivileged ISA Manual, C compressed extension

Common Usage Scenarios

Function Call & Return

Understand this scenario with real code like «c.jal 256 # call subroutine at pc+256».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is CJ format.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

C.JAL is defined only for RV32C; RV64C uses that encoding space for C.ADDIW.
The link register is fixed to x1/ra, unlike JAL where rd is selectable.

FAQ

Why is c.jal RV32C-only?

The C extension defines C.JAL for RV32C; in RV64C the same encoding space is used for C.ADDIW.

Is c.jal just an assembler pseudo-instruction?

No. It is a 16-bit encoded instruction defined by the C extension.