C.JAL

RISC-V C.JAL Instruction Details

Instruction ManualC-type

Unconditional jump; write return address to x1. CJ format, RV32C.

Instruction Syntax

c.jal offset
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
CCompressed Instruction

Instruction Behavior

c.jal is an RV32C instruction. It jumps by a compressed J-format PC-relative offset and writes the next instruction address to x1/ra.

Quick Understanding & Search Notes

c.jal is an RV32C instruction. It jumps by a compressed J-format PC-relative offset and writes the next instruction address to x1/ra.

Compressed instructions usually mirror a 32-bit base instruction semantic, but with register-subset, immediate-encoding, or XLEN restrictions.
C.JAL is defined only for RV32C; RV64C uses that encoding space for C.ADDIW.
The link register is fixed to x1/ra, unlike JAL where rd is selectable.

Common Usage Scenarios

Function Call & Return

Understand this scenario with real code like «c.jal 256 # call subroutine at pc+256».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is C-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

C.JAL is defined only for RV32C; RV64C uses that encoding space for C.ADDIW.
The link register is fixed to x1/ra, unlike JAL where rd is selectable.

FAQ

Why is c.jal RV32C-only?

The C extension defines C.JAL for RV32C; in RV64C the same encoding space is used for C.ADDIW.

Is c.jal just an assembler pseudo-instruction?

No. It is a 16-bit encoded instruction defined by the C extension.