Why is c.jal RV32C-only?
The C extension defines C.JAL for RV32C; in RV64C the same encoding space is used for C.ADDIW.
C.JAL
RISC-V C.JAL Instruction Details
Instruction ManualCJ formatRV32C 16-bit CJ jump: add a signed byte offset to PC and write old PC+2 to x1.
Instruction Syntax
c.jal offset
RV32 C 2.0/Zca; 16-bit CJ format, with only an offset operand and fixed x1/ra link register.
offset is an even byte displacement from -2048 to 2046; reassemble scattered fields with bit0=0 and interpret the result as signed 12-bit.
Target=old PC+offset; x1=old PC+2, with 32-bit address wraparound. RV64 uses the same encoding space for C.ADDIW.
CCompressed Instruction
Related Search Terms
Instruction Behavior
c.jal is an RV32C-only CJ-format instruction: it adds the sign-extended, 2-byte-aligned PC-relative offset to pc and writes pc+2 to x1/ra.
C.JAL Decode & Execute Animation
Shows only manual-defined compressed fields, operands, and architectural state; it does not model a pipeline, cache, or timing.
Execution context (RV32 C/Zca)
PC 0x00001000 -> 0x00001100; x1/ra <- 0x00001002
16-bit encoding fields
15..13
funct3
001
12
offset[11]
0
11
offset[4]
0
10..9
offset[9:8]
01
8
offset[10]
0
7
offset[6]
0
6
offset[7]
0
5..3
offset[3:1]
000
2
offset[5]
0
1..0
op
01
Current calculation
imm[11:0]=000100000000 (bit0=0); sext12 -> 256 bytes; x1 fixed
The commit step reveals the architectural result.
Quick Understanding & Search Notes
c.jal is an RV32C-only CJ-format instruction: it adds the sign-extended, 2-byte-aligned PC-relative offset to pc and writes pc+2 to x1/ra.
Compressed instructions usually mirror a 32-bit base instruction semantic, but with register-subset, immediate-encoding, or XLEN restrictions.
C.JAL is defined only for RV32C; RV64C uses that encoding space for C.ADDIW.
The link register is fixed to x1/ra, unlike JAL where rd is selectable.
Common Usage Scenarios
Short-range jump and link
RV32 C/Zca, old PC=0x1000: c.jal 256 gives PC=0x1100 and x1/ra=0x1002.
Pre-Use Checklist
Syntax Check
- RV32 C 2.0/Zca; 16-bit CJ format, with only an offset operand and fixed x1/ra link register.
- offset is an even byte displacement from -2048 to 2046; reassemble scattered fields with bit0=0 and interpret the result as signed 12-bit.
Semantic Check
- Target=old PC+offset; x1=old PC+2, with 32-bit address wraparound. RV64 uses the same encoding space for C.ADDIW.
Pitfalls / Common Confusions
C.JAL is defined only for RV32C; RV64C uses that encoding space for C.ADDIW.
The link register is fixed to x1/ra, unlike JAL where rd is selectable.
FAQ
Is c.jal just an assembler pseudo-instruction?
No. It is a 16-bit encoded instruction defined by the C extension.