C.JALR

RISC-V C.JALR Instruction Details

Instruction ManualC-type

RV32/RV64: target is old x[rs1] with bit 0 cleared; x1=PC+2. The rs1=x0 encoding is C.EBREAK.

Instruction Syntax

c.jalr rs1
Operand Breakdown
RV32/RV64, C 2.0 or Zca; 16-bit CR format.
Full five-bit rs1 selects x1–x31; rs2 is fixed zero, with no explicit immediate.
The target clears bit 0 of old x[rs1]; x1/ra receives old PC+2. rs1=x0 selects C.EBREAK and performs no such jump or link.
CCompressed Instruction

Instruction Behavior

C.JALR is a 16-bit CR instruction in C 2.0 / Zca. Its full five-bit rs1 field selects a valid jump source x1–x31; rs2 is fixed zero. It clears bit 0 of old x[rs1] for the target PC and separately writes old PC+2 to x1/ra, using the old source even when rs1=x1. Comparison with jalr x1, 0(rs1) must preserve the difference: 32-bit JALR links PC+4, while C.JALR links PC+2. rs1=x0 selects C.EBREAK and performs neither this jump nor link.

C.JALR Compressed Encoding Lab

Connect 16-bit fields to compressed constraints, base-instruction semantics, and visible architectural state.

c.jalr
Before jump
PC = 0x0000000000001000, x1 = 0x0000000000002001
Architectural result
PC = 0x0000000000002000; x1 = 0x0000000000001002

RV32C/RV64C / Zca; IALIGN=16; this example has no external debug override of C.EBREAK.

16-bit encoding and field roles

15..12
1001
funct4
11..7
00001
rs1 -> x1
6..2
00000
fixed rs2
1..0
10
C2

Visible calculation

x[rs1]
0x0000000000002001
& ~1
new PC
0x0000000000002000
PC
0x0000000000001000
+ 2
x1 / ra
0x0000000000001002

The target clears bit 0 and the link uses the compressed 2-byte length.

Control-flow path

CR fields
1001 00001 00000 10
Target normalization
x[rs1] & ~1 -> 0x0000000000002000
Base semantic comparison
jalr x1, 0(x1)
Link and jump commit
pc <- 0x0000000000002000; x1/ra <- 0x0000000000001002
Architectural state has not been committed.

Quick Understanding & Search Notes

RV32/RV64: target is old x[rs1] with bit 0 cleared; x1=PC+2. The rs1=x0 encoding is C.EBREAK.

CR: funct4=1001, rs1=[11:7], rs2=[6:2]=00000, op=10.
C allows IALIGN=16; clearing bit 0 satisfies instruction alignment, so no instruction-address-misaligned exception occurs.

Common Usage Scenarios

Function Call & Return

RV32/RV64, old ra=0x2001 and PC=0x1000: c.jalr ra gives PC=0x2000 and ra=0x1002; the target uses old ra.

Pre-Use Checklist

Syntax Check
  • RV32/RV64, C 2.0 or Zca; 16-bit CR format.
  • Full five-bit rs1 selects x1–x31; rs2 is fixed zero, with no explicit immediate.
Semantic Check
  • The target clears bit 0 of old x[rs1]; x1/ra receives old PC+2. rs1=x0 selects C.EBREAK and performs no such jump or link.

Pitfalls / Common Confusions

rs1 must not be x0 (that encoding is C.EBREAK)
The JALR target clears bit 0; the link address is pc+2

FAQ

Does rs1=ra overwrite the target first?

No. The target uses old ra before the link write. With old ra=0x2001 and PC=0x1000, the result is PC=0x2000 and ra=0x1002.

Is rs1=x0 an ordinary jump?

No. That code point is C.EBREAK. Unless an external debug environment overrides its behavior, it raises a breakpoint exception and performs no C.JALR jump or link.