C.LI

RISC-V C.LI Instruction Details

Instruction ManualCI format

Load a sign-extended 6-bit immediate into a nonzero rd: rd = imm. CI format.

Instruction Syntax

c.li rd, imm
Operand Breakdown
rd: full 5-bit destination field, x1–x31 for the regular form; old rd is not a source.
imm: imm[5] and imm[4:0] form an unscaled signed 6-bit value, sign-extended to XLEN, from -32 through 31 including zero.
The rd=x0 encoding is a HINT and does not change the zero register.
CCompressed Instruction

Extension condition: C (or Zca) on RV32I/RV64I; 16-bit encoding, IALIGN=16. The animation assumes successful instruction fetch and no asynchronous interrupt.

Instruction Behavior

C.LI uses the CI format to write a sign-extended 6-bit immediate to a nonzero rd and expands to addi rd, x0, imm. rd is a full 5-bit field; encodings with rd=x0 are HINTs rather than ordinary C.LI writeback.

C.LI Execution Animation

RV32I/RV64I + C (or Zca), 16-bit encoding, IALIGN=16.

Instruction Syntax: c.li rd, imm
Execution Context
sext_32(111011) = -5 = 0xFFFFFFFB
x10 ← 0xFFFFFFFB; PC ← 0x00002002
16-bit Encoding0x556D = 0101010101101101
funct3 [15..13]
010
imm[5] [12]
1
rd [11..7]
01010 → x10
imm[4:0] [6..2]
11011
op [1..0]
01
imm[5]=1, imm[4:0]=11011
imm[5:0]=111011 → -5
Sign-extend to XLEN; no scaling
Fixed source: x0=0
C.LI

Restore compressed operands

Restore full register fields and the immediate, distinguishing ordinary instructions, HINTs, and shared encodings.

Current architectural state (before commit): x10=0x00000000; PC=0x00002000

These are teaching steps for architectural effects, not processor pipeline stages or cycles.

Quick Understanding & Search Notes

C.LI is a 16-bit CI encoding that writes a signed 6-bit immediate to rd; the regular form requires nonzero rd.

C.LI expands to addi rd, x0, imm, with the immediate sign-extended to XLEN.
rd is a full 5-bit field, but the rd=x0 encoding is a HINT; it is not a C.LI that changes x0.
16-bit CI encoding: funct3[15:13]=010, imm[5] at bit 12, full 5-bit rd at bits 11:7, imm[4:0] at bits 6:2, op[1:0]=01. The immediate is unscaled; C.LI neither reads old rd nor accesses data memory.

Common Usage Scenarios

Immediates & Constants

RV32I/RV64I + C/Zca, c.li x10, 5 writes 5 to x10 without reading old x10 or accessing data memory, and advances PC by 2.

Pre-Use Checklist

Syntax Check
  • Verify C or Zca on RV32I/RV64I; these 16-bit encodings use full 5-bit register fields.
  • The unscaled immediate is signed 6-bit, from -32 through 31; the regular form requires nonzero rd, and C.ADDI also excludes imm=0.
Semantic Check
  • Distinguish ordinary writeback, HINTs, and shared encodings; do not present a HINT as ordinary arithmetic.
  • C.LI sign-extends its immediate to XLEN; old rd is not a source and no data memory is accessed.

Pitfalls / Common Confusions

Regular C.LI requires nonzero rd; the rd=x0 encoding is a HINT and does not write an ordinary C.LI result.
The immediate is a signed 6-bit value from -32 through 31.

FAQ

Which immediates can C.LI load?

C.LI has a signed 6-bit CI immediate field, so it can load values from -32 through 31.