Is it always equivalent to a same-named 32-bit instruction?
Not always. Some C/Zc instructions compress common 32-bit operations, while others have dedicated stack-frame or table-jump semantics.
C.LUI
RISC-V C.LUI Instruction Details
Instruction ManualC-typeLoad non-zero 6-bit imm to rd[17:12]; clear lower 12 bits; sign-extend. CI format.
Instruction Syntax
c.lui rd, imm
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
CCompressed Instruction
Instruction Behavior
C.LUI (CI format) loads non-zero 6-bit immediate into bits 17:12 of rd, clears lower 12 bits, sign-extends bit 17. Expands to lui rd,imm. rd≠{x0,x2} and imm≠0. HINT when rd=x0. C.ADDI16SP when rd=x2.
Quick Understanding & Search Notes
C.LUI is the 16-bit encoding form for compressed load upper immediate; its semantics and encodable register/immediate ranges must be read from the official C extension rules.
Compressed instructions often restrict register sets, immediate encodings, or destination registers; illegal combinations can be reserved.
Examples show assembly intent; actual encoding constraints follow the official C/Zc tables.
Common Usage Scenarios
Immediates & Constants
Understand this scenario with real code like «c.lui x10, 1 # x10 = 0x00001000».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is C-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
imm must be non-zero
rd!=x2 (otherwise C.ADDI16SP)
FAQ
Why do register restrictions matter?
Many 16-bit encodings can represent only a compressed register subset or fixed registers such as sp, ra, a0/a1.