Why is the C.ADDI16SP immediate range not every integer?
The immediate is encoded with a 16-byte scale, so only nonzero multiples of 16 from -512 through 496 are encodable.
C.ADDI16SP
RISC-V C.ADDI16SP Instruction Details
Instruction ManualC-typeAdd nonzero sign-extended nzimm[9:4] to stack pointer x2/sp; the immediate is a multiple of 16 bytes. CI format; it shares encoding space with C.LUI.
Instruction Syntax
c.addi16sp nzimm
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
CCompressed Instruction
Instruction Behavior
C.ADDI16SP shares encoding space with C.LUI but fixes the destination field to x2/sp. It sign-extends scattered nonzero nzimm[9:4] and adds it to x2/sp; this immediate represents 16-byte multiples from -512 through 496. It expands to addi x2, x2, nzimm[9:4]; the nzimm=0 encoding is reserved.
C.ADDI16SP Decode And Execute Animation
Decodes the real 16-bit CR or CI encoding and distinguishes normal instructions, HINTs, and shared encodings.
Instruction Syntax
Fixed destination/source register
x2 / sp
Not an editable assembly operandExecution Context
16-bit Encoding
0x713D = 0111000100111101funct3 [15..13]
011
nzimm[9] [12]
1
rd [11..7]
00010 (x2/sp)
nzimm[4|6|8:7|5] [6..2]
01111
op [1..0]
01
Operands And Calculation
x2/sp = 0x00001000
nzimm[9:4] = 111110 → -32
0x00001000 + -32 (mod 2^32)
Current Step
Step 1: identify C.ADDI16SP with fixed x2/sp
The animation shows C-extension 16-bit fields directly instead of pretending this is a 32-bit scalar instruction.
Decoded Result And Architectural State
C.ADDI16SP
Before the writeback step, x2/sp retains the read old value; the calculation above is pending writeback.
This animation shows only officially defined decode, register reads, arithmetic, and architectural state, not a particular implementation's pipeline, cache, prediction, or timing.
Quick Understanding & Search Notes
C.ADDI16SP is a 16-bit C-extension instruction: it reads and writes fixed x2/sp and adds sign-extended nonzero nzimm[9:4]. It encodes only 16-byte multiples from -512 through 496.
funct3=011, op=01, and the rd field is x2; nzimm is scattered as [9] and [4|6|8:7|5].
nzimm=0 is a reserved encoding and must not be presented as ordinary C.ADDI16SP arithmetic or a stack-frame adjustment.
Common Usage Scenarios
Function Call & Return
Understand this scenario with real code like «c.addi16sp -32 # sp -= 32».
Pre-Use Checklist
Syntax Check
- Verify the 16-bit compressed encoding is only available on CPUs supporting the C extension.
- Confirm rd/rs1'/rs2' fields map to x8–x15.
Semantic Check
- Note the limited operand space of compressed instructions.
- Verify this compressed instruction has a corresponding 32-bit expansion.
Pitfalls / Common Confusions
The immediate must be a nonzero multiple of 16 from -512 through 496; nzimm=0 is reserved.
x2/sp is the fixed implicit source and destination register, not a selectable rd.
FAQ
What happens when nzimm=0?
C.ADDI16SP is valid only when nzimm is nonzero; the nzimm=0 encoding is reserved.