C.MV
RISC-V C.MV Instruction Details
Instruction ManualC-typeCopy rs2 into rd. CR format. rs2!=x0.
Instruction Syntax
c.mv rd, rs2
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
CCompressed Instruction
Instruction Behavior
C.MV (CR format, all 32 registers) copies rs2 to rd. Expands to add rd,x0,rs2. rs2≠x0; rs2=x0 is C.JR. HINT when rd=x0 and rs2≠x0.
Common Usage Scenarios
Register Operations
Understand this scenario with real code like «c.mv x10, x11 # x10 = x11».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is C-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
rs2!=x0 (x0 = C.JR)