What happens when shamt is zero?
These eight C.SRAI encodings are HINTs designated for custom use, not ordinary arithmetic shifts. A HINT changes no architectural state except PC advance and applicable performance counters.
C.SRAI
RISC-V C.SRAI Instruction Details
Instruction ManualC-typeCB format: arithmetic-right-shift rd' and write it back to rd'.
Instruction Syntax
c.srai rd', uimm
Operand Breakdown
RV32/RV64 C/Zca; 16-bit CB format, with three-bit rd'/rs1' selecting one x8–x15 read/write register.
shamt[5:0]={inst[12],inst[6:2]}; regular shifts use 1–31 on RV32 or 1–63 on RV64.
Arithmetic right shift fills high bits with the original sign bit and writes back to the same register.
shamt=0 is a HINT designated for custom use; RV32 shamt[5]=1 is designated for custom extensions, not a standard shift.
CCompressed Instruction
Extension condition: RV32/RV64 C/Zca; regular shifts use 1–31 on RV32 or 1–63 on RV64. Zero-shift encodings are HINTs.
Instruction Behavior
C.SRAI uses the CB format with rd' limited to x8-x15. It arithmetic-right-shifts rd' by shamt and writes rd', expanding to srai rd', rd', shamt. In RV32C shamt[5] must be zero; the eight shamt=0 encodings are HINTs designated for custom use, not ordinary C.SRAI instructions.
C.SRAI Decode & Execute Animation
Shows only official 16-bit fields, operands, conditions, and architectural state; it does not model a pipeline, cache, or timing.
c.srai,
Execution context
RV32/RV64 C/Zca
x10=0xFFFFFF80 >> 3 → x10 <- 0xFFFFFFF0
16-bit encoding fields
15..13
funct3
100
12
shamt[5]
0
11..10
funct2
01
9..7
rd'/rs1'
010
6..2
shamt[4:0]
00011
1..0
op
01
Execution data path
CB fields: rd'/rs1'=010 maps to x10; shamt[5:0]=3.
shamt={inst[12],inst[6:2]}=000011=3
signed(0xFFFFFF80) >> 3 = 0xFFFFFFF0
x10 <- 0xFFFFFFF0
Architectural state has not been committed.
Quick Understanding & Search Notes
C.SRAI uses rd' as the same read/write register; arithmetic right shift fills vacated high bits with the original sign bit.
The three-bit CB rd'/rs1' field maps to x8-x15; the shift amount is encoded in shamt[5:0].
RV32C shamt[5]=1 is designated for custom extensions; every shamt=0 C.SRAI encoding is a HINT designated for custom use.
Common Usage Scenarios
Signed integer scaling
RV32 C/Zca, x8=0xffffff80 (-128): c.srai x8, 2 writes x8=0xffffffe0 (-32), filling high bits with the original sign bit.
Pre-Use Checklist
Syntax Check
- RV32/RV64 C/Zca; 16-bit CB format, with three-bit rd'/rs1' selecting one x8–x15 read/write register.
- shamt[5:0]={inst[12],inst[6:2]}; regular shifts use 1–31 on RV32 or 1–63 on RV64.
Semantic Check
- Arithmetic right shift fills high bits with the original sign bit and writes back to the same register.
- shamt=0 is a HINT designated for custom use; RV32 shamt[5]=1 is designated for custom extensions, not a standard shift.
Pitfalls / Common Confusions
rd' limited to x8-x15 (CB format, 3-bit register fields)
RV32 regular shifts use 1–31; shamt[5]=1 encodings are designated for custom extensions, not standard C.SRAI.
The eight shamt=0 encodings are HINTs designated for custom use; do not treat them as ordinary C.SRAI instructions.
FAQ
How does the shift amount differ between RV32C and RV64C?
RV32C requires shamt[5]=0 and designates shamt[5]=1 encodings for custom extensions; RV64C uses the full six-bit shamt field.