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SRAI

RISC-V SRAI Instruction Details

Instruction ManualI-type

Shift rs1 right arithmetically by shamt bits (sign-bit into MSBs), result in rd

Instruction Syntax

srai rd, rs1, shamt
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
RV32IArithmeticShift

Instruction Encoding

31..20
imm[11:0]
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode

SRAI uses opcode 0010011 (0x13), funct3 101, funct7 0100000. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.

Format: I-type
opcode: 0010011 (0x13)
funct3: 101 (0x5)
funct7: 0100000 (0x20)

Instruction Behavior

SRAI (I-type variant, opcode=0010011, funct3=101, funct7=0100000) shifts rs1 right arithmetically by shamt, filling upper bits with the original sign bit (bit31) to preserve sign. Result in rd. funct7 bit30=1 (encoding 0100000), which distinguishes it from SRLI. Used for signed integer division by power of 2.

Quick Understanding & Search Notes

SRAI performs a immediate arithmetic right shift, fills high bits with the original sign bit, and writes rd. The shift amount comes from the shamt immediate field.

RV32I immediate shifts encode the shift amount in a 5-bit shamt field.
Logical right shift fills with zeros; arithmetic right shift copies the sign bit, matching different signed/unsigned use cases.

Common Usage Scenarios

Bit Operations & Masks

Understand this scenario with real code like «srai x5, x6, 2 # x5 = x6 >> 2 (signed, sign-extended)».

Multiplication & Division

Understand this scenario with real code like «srai x5, x6, 2 # x5 = x6 >> 2 (signed, sign-extended)».

Type Conversion

Understand this scenario with real code like «srai x5, x6, 2 # x5 = x6 >> 2 (signed, sign-extended)».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is I-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

bit30 must be 1 (funct7=0100000); otherwise decoded as SRLI
Arithmetic shift rounds toward -inf; integer division truncates toward zero, causing difference for negatives
For RV32I, only low 5 bits of shamt are used

FAQ

Where does the SRAI shift amount come from?

For immediate shifts, the amount comes from the shamt field; in RV32I it is 5 bits.

What is the difference between logical and arithmetic right shift?

Logical right shift fills high bits with zeros. Arithmetic right shift copies the original sign bit, which is usually used to preserve signedness.