Where does the SLLI shift amount come from?
For immediate shifts, the amount comes from the shamt field; in RV32I it is 5 bits.
SLLI
RISC-V SLLI Instruction Details
Instruction ManualI-typeShift rs1 left logically by shamt bits (zeros into LSBs), result in rd
Instruction Syntax
slli rd, rs1, shamt
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
RV32IArithmeticShift
Instruction Encoding
31..20
imm[11:0]
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode
SLLI uses opcode 0010011 (0x13), funct3 001, funct7 0000000. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.
Format: I-type
opcode: 0010011 (0x13)
funct3: 001 (0x1)
funct7: 0000000 (0x00)
Instruction Behavior
SLLI (I-type variant, opcode=0010011, funct3=001, funct7=0000000) shifts rs1 left by shamt (encoded in the lower 5 I-immediate bits, inst[24:20]), with zeros shifted into the lower bits. Result in rd. For RV32I, shamt range is 0-31. funct7 upper bits must be all zeros (0000000), bit30=0.
Quick Understanding & Search Notes
SLLI performs a immediate logical left shift, fills low bits with zeros, and writes rd. The shift amount comes from the shamt immediate field.
RV32I immediate shifts encode the shift amount in a 5-bit shamt field.
Logical right shift fills with zeros; arithmetic right shift copies the sign bit, matching different signed/unsigned use cases.
Common Usage Scenarios
Address & Pointer
Understand this scenario with real code like «slli x5, x6, 2 # x5 = x6 << 2 (multiply by 4)».
Bit Operations & Masks
Understand this scenario with real code like «slli x5, x6, 2 # x5 = x6 << 2 (multiply by 4)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
funct7 must be all zeros (0000000) or instruction is invalid
RV32I shamt is 5 bits and encodes 0-31; larger constants are not valid encodings for the same SLLI instruction
FAQ
What is the difference between logical and arithmetic right shift?
Logical right shift fills high bits with zeros. Arithmetic right shift copies the original sign bit, which is usually used to preserve signedness.