Where does the SRLI shift amount come from?
For immediate shifts, the amount comes from the shamt field; in RV32I it is 5 bits.
SRLI
RISC-V SRLI Instruction Details
Instruction ManualI-typeShift rs1 right logically by shamt bits (zeros into MSBs), result in rd
Instruction Syntax
srli rd, rs1, shamt
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
RV32IArithmeticShift
Instruction Encoding
31..20
imm[11:0]
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode
SRLI uses opcode 0010011 (0x13), funct3 101, funct7 0000000. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.
Format: I-type
opcode: 0010011 (0x13)
funct3: 101 (0x5)
funct7: 0000000 (0x00)
Instruction Behavior
SRLI (I-type variant, opcode=0010011, funct3=101, funct7=0000000) shifts rs1 right logically by shamt (lower 5 bits of immediate), filling upper bits with zeros. Result in rd. For RV32I, funct7 bit30=0 (encoding 0000000), which distinguishes it from SRAI (bit30=1).
Quick Understanding & Search Notes
SRLI performs a immediate logical right shift, fills high bits with zeros, and writes rd. The shift amount comes from the shamt immediate field.
RV32I immediate shifts encode the shift amount in a 5-bit shamt field.
Logical right shift fills with zeros; arithmetic right shift copies the sign bit, matching different signed/unsigned use cases.
Common Usage Scenarios
Bit Operations & Masks
Understand this scenario with real code like «srli x5, x6, 2 # x5 = x6 >> 2 (unsigned divide by 4)».
Multiplication & Division
Understand this scenario with real code like «srli x5, x6, 2 # x5 = x6 >> 2 (unsigned divide by 4)».
Type Conversion
Understand this scenario with real code like «srli x5, x6, 2 # x5 = x6 >> 2 (unsigned divide by 4)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Upper bits always filled with zero (vs SRAI arithmetic shift)
bit30 must be 0; otherwise decoded as SRAI
FAQ
What is the difference between logical and arithmetic right shift?
Logical right shift fills high bits with zeros. Arithmetic right shift copies the original sign bit, which is usually used to preserve signedness.