What does shamt=0 do?
It is a HINT designated for custom use; architectural state is unchanged except PC advance and applicable performance counters.
C.SRLI
RISC-V C.SRLI Instruction Details
Instruction ManualC-typeLogical right shift of rd'. CB format.
Instruction Syntax
c.srli rd', shamt
Operand Breakdown
RV32/RV64 C or Zca; 16-bit CB format, with three-bit rd'/rs1' selecting one x8-x15 source/destination.
shamt={inst[12],inst[6:2]}; regular shifts use 1-31 on RV32 or 1-63 on RV64.
Logical right shift fills high bits with zero and writes the same register.
Zero shift is a custom-use HINT; RV32 shamt[5]=1 is designated for custom extensions.
CCompressed Instruction
Extension condition: RV32/RV64; requires C or Zca.
Instruction Behavior
C.SRLI uses CB format to shift rd' in x8-x15 right logically, filling high bits with zeros and writing the same register. Regular forms expand to srli rd', rd', shamt: 1-31 on RV32 or 1-63 on RV64. Zero is a HINT; RV32 shamt[5]=1 is designated for custom extensions.
C.SRLI Decode & Execute Animation
Shows only official 16-bit fields, conditions, and architectural state; it does not model a pipeline, cache, or timing.
c.srli,
Execution context
RV32/RV64; requires C or Zca; overlapping operands read the same old value.
x10 <- 0x10000002
16-bit encoding fields
15..13
funct3
100
12
shamt[5]
0
11..10
funct2
00
9..7
rd'/rs1'
010
6..2
shamt[4:0]
00011
1..0
op
01
Execution data path
CB rd'/rs1'=010 → x10; shamt={inst[12],inst[6:2]}=3.
0x80000010 >> 3 = 0x10000002
x10 <- 0x10000002
Architectural state has not been committed.
Quick Understanding & Search Notes
C.SRLI logically shifts rd' in x8-x15 right by shamt and writes the same register; shamt=0 is a HINT.
The CB rd'/rs1' three-bit field maps to x8-x15, and shamt is formed from bit 12 and bits 6:2.
In RV32C, shamt[5]=1 is designated for custom extensions; shamt=0 encodings are HINTs.
Common Usage Scenarios
Logical Right Shift
RV32 C/Zca, x8=0x80000010: c.srli x8, 2 yields x8=0x20000004, filling high bits with zero.
Pre-Use Checklist
Syntax Check
- RV32/RV64 C or Zca; 16-bit CB format, with three-bit rd'/rs1' selecting one x8-x15 source/destination.
- shamt={inst[12],inst[6:2]}; regular shifts use 1-31 on RV32 or 1-63 on RV64.
Semantic Check
- Logical right shift fills high bits with zero and writes the same register.
- Zero shift is a custom-use HINT; RV32 shamt[5]=1 is designated for custom extensions.
Pitfalls / Common Confusions
rd' is both source and destination, restricted to x8-x15.
shamt=0 is a HINT designated for custom use; RV32 shamt[5]=1 is not a standard shift.
FAQ
What restricts the high shift bit?
RV32 shamt[5]=1 is designated for custom extensions; RV64 regular shifts can use 1-63.