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CM.POPRET

RISC-V CM.POPRET Instruction Details

Instruction ManualC-type

Restore registers, deallocate frame, and ret

Instruction Syntax

cm.popret {reg_list}, stack_adj
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
ZcmpStack & FunctionsCompressed Instruction
Related Search Terms
CM.POPRET instructionRISC-V CM.POPRETcm.popret syntaxcm.popret encodingcm.popret Zcmpcm.popret compressed instructioncompressed pop and return

Instruction Behavior

CM.POPRET (Zcmp) pops registers in {reg_list}, adjusts sp, then executes ret (jump to ra). Used for function epilogues returning non-zero values. Reuses c.fsdsp encoding, incompatible with Zcd. sp adjustment and ret must commit atomically. Part of Zcmp, depends on Zca.

Quick Understanding & Search Notes

CM.POPRET is the 16-bit encoding form for compressed pop and return; its semantics and encodable register/immediate ranges must be read from the official Zc extension rules.

Compressed instructions often restrict register sets, immediate encodings, or destination registers; illegal combinations can be reserved.
Examples show assembly intent; actual encoding constraints follow the official C/Zc tables.
RISC-V Unprivileged ISA Manual, Zc Extensions

Common Usage Scenarios

Function Call & Return

Understand this scenario with real code like «cm.popret {ra, s0-s3}, 32 # pop ra,s0-s3, sp+=32, ret».

Immediates & Constants

Understand this scenario with real code like «cm.popret {ra, s0-s3}, 32 # pop ra,s0-s3, sp+=32, ret».

Register Operations

Understand this scenario with real code like «cm.popret {ra, s0-s3}, 32 # pop ra,s0-s3, sp+=32, ret».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is C-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Incompatible with Zcd
Preserves a0 value (unlike POPRETZ)
sp adjustment and ret must commit atomically

FAQ

Is it always equivalent to a same-named 32-bit instruction?

Not always. Some C/Zc instructions compress common 32-bit operations, while others have dedicated stack-frame or table-jump semantics.

Why do register restrictions matter?

Many 16-bit encodings can represent only a compressed register subset or fixed registers such as sp, ra, a0/a1.