Is it always equivalent to a same-named 32-bit instruction?
Not always. Some C/Zc instructions compress common 32-bit operations, while others have dedicated stack-frame or table-jump semantics.
CM.POPRET
RISC-V CM.POPRET Instruction Details
Instruction ManualC2 (Zcmp CMPP)Restore registers, deallocate frame, and ret
Instruction Syntax
cm.popret {reg_list}, stack_adj
Operand Breakdown
This is a C2 (Zcmp CMPP)-format instruction. Confirm operand positions based on the assembly syntax.
ZcmpStack & FunctionsCompressed Instruction
Instruction Behavior
CM.POPRET (Zcmp) pops registers in {reg_list}, adjusts sp, then executes ret. It does not write a0. It reuses c.fsdsp encoding and is therefore incompatible with Zcd. After the loads complete, the final atomic section commits the sp adjustment and ret. It is part of Zcmp and depends on Zca.
CM.POPRET Decode & Execute Animation
Shows only Zcmp architectural sequences and conditions; access order, grouping, or replay does not imply implementation detail.
cm.popret {reg_list}, stack_adj
Execution context
Zcmp depends on Zca and is incompatible with Zcd. Correct execution requires idempotent memory at sp; RV32E permits rlist=4-6 only.
sp <- 0x00001040; PC <- ra & ~1 = 0x00002000
16-bit encoding fields
15..13
funct3
101
12..8
fixed
11110
7..4
rlist
0111
3..2
spimm
11
1..0
op
10
rlist=7 restores {ra, s0, s1, s2}; spimm=3 adds 48 bytes beyond stack_adj_base.
Pseudocode address mapping: s2 @ 0x0000103C; s1 @ 0x00001038; s0 @ 0x00001034; ra @ 0x00001030. The actual loads can occur in any order, be grouped, or repeat; sp' = 0x00001000 + 64 = 0x00001040.
sp <- 0x00001040; PC <- ra & ~1 = 0x00002000
Architectural state has not been committed.
Quick Understanding & Search Notes
CM.POPRET is the 16-bit encoding form for compressed pop and return; its semantics and encodable register/immediate ranges must be read from the official Zc extension rules.
Compressed instructions often restrict register sets, immediate encodings, or destination registers; illegal combinations can be reserved.
Examples show assembly intent; actual encoding constraints follow the official C/Zc tables.
Common Usage Scenarios
Function Call & Return
Understand this scenario with real code like «cm.popret {ra, s0-s3}, 32 # pop ra,s0-s3, sp+=32, ret».
Immediates & Constants
Understand this scenario with real code like «cm.popret {ra, s0-s3}, 32 # pop ra,s0-s3, sp+=32, ret».
Register Operations
Understand this scenario with real code like «cm.popret {ra, s0-s3}, 32 # pop ra,s0-s3, sp+=32, ret».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is C2 (Zcmp CMPP).
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Incompatible with Zcd
Preserves a0 value (unlike POPRETZ)
sp adjustment and ret must commit atomically
FAQ
Why do register restrictions matter?
Many 16-bit encodings can represent only a compressed register subset or fixed registers such as sp, ra, a0/a1.