RVOPcode
Home/Instructions/CM-POP
CM.POP

RISC-V CM.POP Instruction Details

Instruction ManualC-type

Restore ra and s0-s11 from stack and adjust sp

Instruction Syntax

cm.pop {reg_list}, stack_adj
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
ZcmpStack & FunctionsCompressed Instruction
Related Search Terms
CM.POP instructionRISC-V CM.POPcm.pop syntaxcm.pop encodingcm.pop Zcmpcm.pop compressed instructioncompressed pop multiple registers

Instruction Behavior

CM.POP (Zcmp) pops registers in {reg_list} from stack and increments sp by stack_adj. Used with CM.PUSH. Note: CM.POP does NOT execute ret — only restores registers and deallocates stack frame. Reuses c.fsdsp encoding, incompatible with Zcd. Part of Zcmp, depends on Zca.

Quick Understanding & Search Notes

CM.POP is the 16-bit encoding form for compressed pop multiple registers; its semantics and encodable register/immediate ranges must be read from the official Zc extension rules.

Compressed instructions often restrict register sets, immediate encodings, or destination registers; illegal combinations can be reserved.
Examples show assembly intent; actual encoding constraints follow the official C/Zc tables.
RISC-V Unprivileged ISA Manual, Zc Extensions

Common Usage Scenarios

Function Call & Return

Understand this scenario with real code like «cm.pop {ra, s0-s5}, 64 # restore ra,s0-s5, sp+=64».

Immediates & Constants

Understand this scenario with real code like «cm.pop {ra, s0-s5}, 64 # restore ra,s0-s5, sp+=64».

Register Operations

Understand this scenario with real code like «cm.pop {ra, s0-s5}, 64 # restore ra,s0-s5, sp+=64».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is C-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Incompatible with Zcd
CM.POP does NOT ret — only restores registers and deallocates frame
Register list and stack adjustment constrained by encoding

FAQ

Is it always equivalent to a same-named 32-bit instruction?

Not always. Some C/Zc instructions compress common 32-bit operations, while others have dedicated stack-frame or table-jump semantics.

Why do register restrictions matter?

Many 16-bit encodings can represent only a compressed register subset or fixed registers such as sp, ra, a0/a1.