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CZERO.NEZ

RISC-V CZERO.NEZ Instruction Details

Instruction ManualR-type

Conditional zero: if rs2 != 0 then rd=0, else rd=rs1

Instruction Syntax

czero.nez rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
ZicondConditional Operations

Instruction Behavior

czero.nez is a Zicond conditional-zero instruction. If rs2 is not equal to zero, rd is written with zero; otherwise rd is written with rs1.

CZERO.NEZ Decode And Execute Animation

Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.

rd
rs1
rs2
czero.nez
,
,
Execution Context
t1(x6)
0x00000014
31..25
24..20
19..15
14..12
11..7
6..0
0000111
funct7
00111
rs2
00110
rs1
111
funct3
00101
rd
0110011
opcode
Execution Data Path
instruction
0x0E7372B3
opcode
0110011 -> OP
funct3
111 -> CZERO.NEZ
funct7
0000111 -> base ALU selector
rd / value rs1 / condition rs2
t0(x5) / t1(x6)=0x00000014 / t2(x7)=0x00000007
conditional zero
t2(x7) != 0; select zero -> 0x00000000
x5
t0(x5) = 0x00000000
Current Step

Concept Step: receive the 32-bit instruction encoding

The machine code is split by the current instruction format; the animation starts from encoding/decode.

encoding: 0x0E7372B3
syntax : czero.nez t0(x5), t1(x6), t2(x7)
result : t0(x5) = 0x00000000
Architectural Result
t0(x5) = 0x00000000

This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.

Quick Understanding & Search Notes

czero.nez is a Zicond conditional-zero instruction. If rs2 is not equal to zero, rd is written with zero; otherwise rd is written with rs1.

It can be used to build branchless conditional-select sequences, but architecturally it only conditionally writes zero.
rd has syntactic dependencies on both rs1 and rs2, as defined by the official manual.

Common Usage Scenarios

Branch & Jump

Understand this scenario with real code like «czero.nez x10, x11, x12 ; x10 = (x12 != 0) ? 0 : x11».

Register Operations

Understand this scenario with real code like «czero.nez x10, x11, x12 ; x10 = (x12 != 0) ? 0 : x11».

Pre-Use Checklist

Syntax Check
  • Verify rd, rs1, rs2 (and rs3) are valid GPRs.
  • Confirm funct3 and funct7 encoding is correct.
Semantic Check
  • Check if the result affects subsequent branches or address calculations.
  • Ensure the rd register is not overwritten by another instruction.

Pitfalls / Common Confusions

It selects only between zero and rs1; it does not branch and does not access memory.
The condition tests whether rs2 is zero; it does not compare rs1 with rs2.

FAQ

Is czero.nez a conditional branch?

No. It does not change the PC; it selects zero or rs1 based on whether rs2 is zero.

Does czero.nez compare two register magnitudes?

No. The condition only tests whether rs2 is zero.