RISC-V FCVT.Q.S Instruction Details

Instruction ManualR-type

Convert single to quad FP. Never rounds. R-type, fmt=Q(11), rs2=source S(00).

Instruction Syntax

fcvt.q.s rd, rs1

Operand Breakdown

Destination rd: register receiving the operation result.

Source rs1: register holding the first operand.

Source rs2: register holding the second operand.

QFloating-Point Convert

Related Search Terms

fcvt.q.s instruction single-precision to quad-precision fcvt.q.s conversion fcvt.q.s exact conversion fcvt.q.s floating point

Instruction Behavior

fcvt.q.s converts a single-precision source operand to a wider quad-precision result. This floating-point widening conversion is exact and does not round.

Quick Understanding & Search Notes

fcvt.q.s converts a single-precision source operand to a wider quad-precision result. This floating-point widening conversion is exact and does not round.

The rs2/fmt encoding selects source and destination formats; the mnemonic suffixes carry the main semantic distinction.

This is a floating-point widening conversion, not a narrowing conversion; rm does not affect the numeric result.

The floating-point source operand in a wider FLEN register must satisfy NaN-boxing rules.

The floating-point result is NaN-boxed in the FLEN register according to the destination format.

RISC-V Unprivileged ISA Manual, Q quad-precision floating-point extension

Common Usage Scenarios

Floating Point Basic

Understand this scenario with real code like «fcvt.q.s f0, f1 # f0 = (quad)(float)f1».

Numerical Computing

Understand this scenario with real code like «fcvt.q.s f0, f1 # f0 = (quad)(float)f1».

Pre-Use Checklist

Syntax Check

Confirm the current instruction format is R-type.
Confirm the operand order matches the example.

Semantic Check

Ensure the destination register usage is compatible with the calling convention.
Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions