FDIV.Q

RISC-V FDIV.Q Instruction Details

Instruction ManualR-type

Quad-precision floating-point division: rd = rs1 / rs2.

Instruction Syntax

fdiv.q rd, rs1, rs2, rm
Operand Breakdown
rd: destination floating-point register receiving the formatted result.
rs1/rs2: source floating-point registers; arithmetic/rounding forms with rm use rm or dynamic frm for rounding mode.
QFloating-Point Arithmetic

Instruction Behavior

FDIV.Q performs quad-precision floating-point division for fdiv.q, rounds the result according to rm or the dynamic rounding mode, and writes rd. Special values, NaNs, infinities, divide-by-zero cases, and exception flags follow the IEEE 754 rules adopted by the RISC-V floating-point extensions.

Quick Understanding & Search Notes

FDIV.Q is a Q-related quad-precision floating-point division instruction. It produces a floating-register result, uses rm when rounding is required, and records floating-point exception flags such as NV, DZ, OF, UF, and NX in fflags.

The .Q suffix selects the operand and result floating-point format; narrower formats in wider FLEN registers follow NaN-boxing rules.
rm is a machine-instruction field; when assembly omits it, the assembler usually selects dynamic rounding or its default spelling.

Common Usage Scenarios

Floating Point Basic

Understand this scenario with real code like «fdiv.q f0, f1, f2, rne # f0 = f1/f2».

Numerical Computing

Understand this scenario with real code like «fdiv.q f0, f1, f2, rne # f0 = f1/f2».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Rounding comes from the rm field; rm=111 uses the dynamic frm rounding mode.
Floating-point exceptions are recorded in fflags, not as integer branch conditions or integer traps.
0/0, nonzero divided by zero, NaNs, and infinities follow IEEE 754/RISC-V floating-point result rules.

FAQ

Does FDIV.Q raise integer exceptions?

No. RISC-V floating-point exceptions are accrued in fflags; software reads floating-point status state to observe them.

What does rm mean for FDIV.Q?

rm selects the rounding mode; the dynamic rounding mode comes from frm. For exact results it does not change the value, but the field is still part of the instruction encoding.