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FDIV.S

RISC-V FDIV.S Instruction Details

Instruction ManualR-type

Performs single-precision floating-point division: rd = rs1/rs2.

Instruction Syntax

fdiv.s rd, rs1, rs2, rm
Operand Breakdown
rd: destination floating-point register receiving the formatted result.
rs1/rs2: source floating-point registers; arithmetic/rounding forms with rm use rm or dynamic frm for rounding mode.
FFloating-Point Arithmetic
Related Search Terms
FDIV.S instructionRISC-V FDIV.Sfdiv.s syntaxfdiv.s encodingfdiv.s Fsingle-precision floating divide

Instruction Behavior

FDIV.S divides single-precision floating-point rs1 by rs2, rounds according to rm, and writes rd. Divide-by-zero, invalid operation, overflow, underflow, and inexact cases produce results and fflags according to the RISC-V F extension/IEEE 754 rules; not every zero-divisor case is simply infinity.

Quick Understanding & Search Notes

FDIV.S is a floating-point arithmetic instruction. It uses the rm field for rounding mode and sets fflags exception flags according to IEEE 754/RISC-V floating-point rules.

The .S suffix uses 32-bit single precision from the F extension.
Divide-by-zero, 0/0, infinities, and NaNs are handled by floating-point result classification and exception flags.
RISC-V Unprivileged ISA Manual, F Extension

Common Usage Scenarios

Multiplication & Division

Understand this scenario with real code like «fdiv.s f0, f1, f2 # f0 = f1/f2 (RNE)».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Rounding is selected by rm or the dynamic rounding mode.
Floating-point exceptions are recorded in fflags, not integer condition flags.
0/0 is invalid operation; do not describe every zero-divisor case as the same result.

FAQ

Does it raise integer exceptions?

No. Floating-point exceptions are recorded in fflags and results follow the floating-point rules.

Can rm be omitted?

Assemblers may provide a dynamic/default spelling, but the machine instruction contains a rounding-mode field.