FSQRT.S

RISC-V FSQRT.S Instruction Details

Instruction ManualR-type

Computes single-precision floating-point square root: f[rd] = sqrt(f[rs1]).

Instruction Syntax

fsqrt.s rd, rs1, rm
Operand Breakdown
rd: destination floating-point register receiving the square-root result.
rs1: the only source floating-point register; the encoded rs2 field is fixed to 00000 and is not a syntax operand.
rm: rounding-mode field; rm=111 uses the dynamic frm rounding mode.
FFloating-Point Arithmetic

Instruction Behavior

FSQRT.S uses OP-FP encoding with fmt=S to compute the square root of one single-precision floating-point operand, rounds according to rm or dynamic frm, and writes FP register rd. The encoded rs2 field is fixed to 00000; negative nonzero inputs, NaNs, infinities, and inexact results produce results and fflags according to the RISC-V F-extension FP rules.

FSQRT.S Decode And Execute Animation

Shows the F-extension single-precision OP-FP flow: decode fields, read FP operands, perform FSQRT semantics, then write rd.

rd
rs1
rm
fsqrt.s
,
,
Execution Context
FLEN=32 / fmt=S (00)
rounding: RNE nearest-even
fflags: example fflags remains 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
01011
FSQRT
00
fmt=S
00000
rs2
01011
rs1
000
rm
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0x58058553
opcode
1010011 -> OP-FP
funct5/fmt
01011 + S(00) -> FSQRT.S
rm
000 -> RNE nearest-even
rd/rs
fa0(f10) / fa1(f11) / rs2=00000
read
9.0
FP op
sqrt(9.0) = 3.0
write
fa0(f10) = 3.0; example fflags remains 0
Current Step

Fetch: show the 32-bit OP-FP encoding

The word is split as an R-type OP-FP instruction; single-precision OP-FP instructions use opcode 1010011.

encoding: 0x58058553
syntax : fsqrt.s fa0(f10), fa1(f11), rne
result : fa0(f10) = 3.0; example fflags remains 0

The default example sqrt(9.0)=3.0 is exactly representable, so example fflags remains 0.

Single-precision Calculation
rs1
fa1(f11) = 9.0
result
sqrt(9.0) = 3.0

The default example sqrt(9.0)=3.0 is exactly representable, so example fflags remains 0.

This animation shows only F-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.

Quick Understanding & Search Notes

FSQRT.S is the F-extension single-precision square root. It has one source FP register; the encoding still contains rs2 but fixes it to 00000. rm/frm controls rounding and fflags records applicable FP exceptions.

The syntax operands are rd, rs1, and rm; the animation does not expose rs2 as user input.
fmt=S denotes 32-bit single precision, and funct5=FSQRT selects square root.
The animation uses the exact example sqrt(9.0)=3.0, so example fflags remains 0; negative nonzero inputs and inexact results still follow the official FP rules.

Common Usage Scenarios

Numerical Computing

Understand this scenario with real code like «fsqrt.s f0, f1 # f0 = sqrt(f1) (RNE)».

Type Conversion

Understand this scenario with real code like «fsqrt.s f0, f1 # f0 = sqrt(f1) (RNE)».

Pre-Use Checklist

Syntax Check
  • rd: destination floating-point register receiving the square-root result.
  • rs1: the only source floating-point register; the encoded rs2 field is fixed to 00000 and is not a syntax operand.
  • rm: rounding-mode field; rm=111 uses the dynamic frm rounding mode.
Semantic Check
  • Confirm the floating-point format suffix (.H/.S/.D/.Q) matches the data width.
  • Decide whether software must inspect fflags for NV, DZ, OF, UF, or NX.

Pitfalls / Common Confusions

FSQRT.S assembly syntax has only rd, rs1, and rm; rs2 is a fixed encoding field, not a second source operand.
Negative nonzero inputs follow floating-point invalid-operation rules; do not describe this as an integer exception.
sqrt(9.0)=3.0 is the exact animation example; inexact results such as sqrt(2.0) may set NX.

FAQ

Why does FSQRT.S have no rs2 operand?

Square root is a unary FP operation. The machine encoding still has an rs2 field, but it is fixed to 00000 and does not correspond to a second source register in assembly syntax.

How are negative inputs handled?

Negative nonzero inputs follow floating-point invalid-operation rules, producing the specified result and fflags; this is not an integer exception or branch condition.