FSQRT.Q

RISC-V FSQRT.Q Instruction Details

Instruction ManualR-type

Quad-precision floating-point square root: rd = sqrt(rs1).

Instruction Syntax

fsqrt.q rd, rs1, rm
Operand Breakdown
rd: destination floating-point register receiving the square-root result.
rs1: the only source floating-point register; the encoded rs2 field is fixed to 00000 and is not a syntax operand.
rm: rounding-mode field; rm=111 uses the dynamic frm rounding mode.
QFloating-Point Arithmetic

Instruction Behavior

FSQRT.Q computes the quad-precision floating-point square root, rounds according to rm or the dynamic rounding mode, and writes rd. A negative nonzero finite operand or -infinity produces canonical NaN and sets NV; sqrt(-0) remains -0.

FSQRT.Q Decode And Execute Animation

Shows the Q-extension quad-precision OP-FP flow: decode fields, read FP operands, perform FSQRT semantics, then write rd.

rd
rs1
rm
fsqrt.q
,
,
Execution Context
FLEN=128 / fmt=Q (11)
rounding: RNE nearest-even
fflags: example fflags remains 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
01011
FSQRT
11
fmt=Q
00000
rs2
01011
rs1
000
rm
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0x5E058553
opcode
1010011 -> OP-FP
funct5/fmt
01011 + Q(11) -> FSQRT.Q
rm
000 -> RNE nearest-even
rd/rs
fa0(f10) / fa1(f11) / rs2=00000
read
2.25
FP op
sqrt(2.25) = 1.5
write
fa0(f10) = 1.5; example fflags remains 0
Current Step

Fetch: show the 32-bit OP-FP encoding

The word is split as an R-type OP-FP instruction; quad-precision OP-FP instructions use opcode 1010011.

encoding: 0x5E058553
syntax : fsqrt.q fa0(f10), fa1(f11), rne
result : fa0(f10) = 1.5; example fflags remains 0

The default example sqrt(9.0)=3.0 is exactly representable, so example fflags remains 0.

Quad-precision Calculation
rs1
fa1(f11) = 2.25
result
sqrt(2.25) = 1.5

The default example sqrt(9.0)=3.0 is exactly representable, so example fflags remains 0.

This animation shows only Q-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.

Quick Understanding & Search Notes

FSQRT.Q is Q-extension quad-precision floating-point square root. It uses OP-FP encoding with funct5=01011, fmt=Q(11), and rs2 fixed to 00000; it reads the rs1 quad-precision value, rounds according to rm or dynamic frm, and writes rd.

FSQRT.Q is a unary OP-FP instruction; rs2 is encoded as 00000 and no second source register appears in the syntax.
Negative nonzero finite inputs and -infinity take the invalid-operation path; sqrt(-0) remains -0.
The animation uses exactly checkable default examples instead of pretending JavaScript double values model full quad-precision square root.

Common Usage Scenarios

Floating Point Basic

Understand this scenario with real code like «fsqrt.q f0, f1, rne # f0 = sqrt(f1)».

Numerical Computing

Understand this scenario with real code like «fsqrt.q f0, f1, rne # f0 = sqrt(f1)».

Pre-Use Checklist

Syntax Check
  • rd: destination floating-point register receiving the square-root result.
  • rs1: the only source floating-point register; the encoded rs2 field is fixed to 00000 and is not a syntax operand.
  • rm: rounding-mode field; rm=111 uses the dynamic frm rounding mode.
Semantic Check
  • Confirm the floating-point format suffix (.H/.S/.D/.Q) matches the data width.
  • Decide whether software must inspect fflags for NV, DZ, OF, UF, or NX.

Pitfalls / Common Confusions

Rounding comes from the rm field; rm=111 uses the dynamic frm rounding mode.
Floating-point exceptions are recorded in fflags, not as integer branch conditions or integer traps.
The square-root negative-input edge case distinguishes -0 from other negative values.

FAQ

How does the encoding identify quad-precision square root?

opcode=1010011 enters OP-FP, funct5=01011 selects FSQRT, fmt=11 selects the Q quad-precision format, and rs2 is fixed to 00000.

Does FSQRT.Q treat negative zero like other negative numbers?

No. The official FP rules preserve sqrt(-0)=-0; negative nonzero finite numbers and -infinity take the invalid-operation/NaN path.