Why does FSQRT.D have no rs2 operand?
Square root is a unary FP operation. The machine encoding still has an rs2 field, but it is fixed to 00000 and does not correspond to a second source register in assembly syntax.
FSQRT.D
RISC-V FSQRT.D Instruction Details
Instruction ManualR-typeComputes double-precision floating-point square root: f[rd] = sqrt(f[rs1]).
Instruction Syntax
fsqrt.d rd, rs1, rm
Operand Breakdown
rd: destination floating-point register receiving the square-root result.
rs1: the only source floating-point register; the encoded rs2 field is fixed to 00000 and is not a syntax operand.
rm: rounding-mode field; rm=111 uses the dynamic frm rounding mode.
DFloating-Point Arithmetic
Instruction Behavior
FSQRT.D uses OP-FP encoding with fmt=D to compute the square root of one double-precision floating-point operand, rounds according to rm or dynamic frm, and writes FP register rd. The encoded rs2 field is fixed to 00000; NaN-boxing, negative nonzero inputs, NaNs, infinities, and inexact results produce results and fflags according to the RISC-V D/F-extension FP rules.
FSQRT.D Decode And Execute Animation
Shows the D-extension double-precision OP-FP flow: decode fields, read FP operands, perform FSQRT semantics, then write rd.
rd
rs1
rm
fsqrt.d
,
,
Execution Context
FLEN=>=64 / fmt=D (01)
rounding: RNE nearest-even
fflags: invalid input, using default example
These execution-context inputs are invalid and are not used for encoding or execution: fa1(f11) value (rs1). The animation is using legal FSQRT.D default example values.
31..27
26..25
24..20
19..15
14..12
11..7
6..0
01011
FSQRT
01
fmt=D
00000
rs2
01011
rs1
000
rm
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0x5A058553
opcode
1010011 -> OP-FP
funct5/fmt
01011 + D(01) -> FSQRT.D
rm
000 -> RNE nearest-even
rd/rs
fa0(f10) / fa1(f11) / rs2=00000
read
9.0
FP op
sqrt(9.0) = 3.0
write
fa0(f10) = 3.0; invalid input, using default example
Current Step
Fetch: show the 32-bit OP-FP encoding
The word is split as an R-type OP-FP instruction; double-precision OP-FP instructions use opcode 1010011.
encoding: 0x5A058553
syntax : fsqrt.d fa0(f10), fa1(f11), rne
result : fa0(f10) = 3.0; invalid input, using default example
This animation accepts only whitelisted finite exact examples, and the computed result must also stay in the whitelist; NaN, infinity, and rounding-boundary paths are covered in static text. Invalid input is not used for calculation.
Double-precision Calculation
rs1
fa1(f11) = 9.0
result
sqrt(9.0) = 3.0
This animation accepts only whitelisted finite exact examples, and the computed result must also stay in the whitelist; NaN, infinity, and rounding-boundary paths are covered in static text. Invalid input is not used for calculation.
This animation shows only D-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.
Quick Understanding & Search Notes
FSQRT.D is the D-extension double-precision square root. It has one source FP register; the encoding still contains rs2 but fixes it to 00000. rm/frm controls rounding, while NaN-boxing and fflags follow the official D/F FP rules.
The syntax operands are rd, rs1, and rm; the animation does not expose rs2 as user input.
fmt=D denotes 64-bit double precision, and funct5=FSQRT selects square root.
The animation uses the exact example sqrt(9.0)=3.0, so example fflags remains 0; negative nonzero inputs, failed NaN-boxing checks, and inexact results still follow the official FP rules.
Common Usage Scenarios
Numerical Computing
Understand this scenario with real code like «fsqrt.d f0, f1 # f0 = sqrt(f1) (RNE)».
Geometry
Understand this scenario with real code like «fsqrt.d f0, f1 # f0 = sqrt(f1) (RNE)».
Scientific Computing
Understand this scenario with real code like «fsqrt.d f0, f1 # f0 = sqrt(f1) (RNE)».
Pre-Use Checklist
Syntax Check
- rd: destination floating-point register receiving the square-root result.
- rs1: the only source floating-point register; the encoded rs2 field is fixed to 00000 and is not a syntax operand.
- rm: rounding-mode field; rm=111 uses the dynamic frm rounding mode.
Semantic Check
- Confirm the floating-point format suffix (.H/.S/.D/.Q) matches the data width.
- Decide whether software must inspect fflags for NV, DZ, OF, UF, or NX.
Pitfalls / Common Confusions
FSQRT.D assembly syntax has only rd, rs1, and rm; rs2 is a fixed encoding field, not a second source operand.
D-extension double-precision operands in wider FLEN are constrained by NaN-boxing rules.
sqrt(9.0)=3.0 is the exact animation example; inexact results such as sqrt(2.0) may set NX.
FAQ
How are negative inputs handled?
Negative nonzero inputs follow floating-point invalid-operation rules, producing the specified result and fflags; this is not an integer exception or branch condition.