FSQ

RISC-V FSQ Instruction Details

Instruction ManualS-type

Store a 16-byte quad-precision floating-point value to memory.

Instruction Syntax

fsq rs2, offset(rs1)
Operand Breakdown
rs2: source floating-point register providing the encoding written to memory.
rs1: integer base-address register.
offset: signed 12-bit byte offset added to rs1 to form the effective address.
QFloating-Point Store

Instruction Encoding

31..25
imm[11:5]
24..20
rs2
19..15
rs1
14..12
funct3
11..7
imm[4:0]
6..0
opcode

FSQ uses opcode 0100111 (0x27), funct3 100. The rs1 field selects the integer base register, rs2 selects the source floating-point register, and the immediate provides a byte offset.

Format: S-type
opcode: 0100111 (0x27)
funct3: 100 (0x4)

Instruction Behavior

FSQ forms the effective address by adding a sign-extended 12-bit offset to x[rs1] and stores the 16-byte quad-precision floating-point encoding from f[rs2] to memory. The store writes the format-width bits and performs no numeric conversion.

Quick Understanding & Search Notes

FSQ is a quad-precision memory instruction between floating-point registers and memory. Address calculation uses base plus signed 12-bit byte offset, like integer load/store instructions.

The access width is 16 bytes; strict alignment and misaligned handling depend on the execution environment.
The store writes the source floating register encoding for that format bit-for-bit.

Common Usage Scenarios

Floating-Point Memory

Understand this scenario with real code like «fsq f0, 0(x10) # store quad to [x10+0]».

Data Load/Store

Understand this scenario with real code like «fsq f0, 0(x10) # store quad to [x10+0]».

Pre-Use Checklist

Syntax Check
  • rs2: source floating-point register providing the encoding written to memory.
  • rs1: integer base-address register.
  • offset: signed 12-bit byte offset added to rs1 to form the effective address.
Semantic Check
  • Confirm offset is a byte offset, not an element index.
  • Confirm the store writes the source floating-point encoding for that format without format conversion.

Pitfalls / Common Confusions

offset is a signed 12-bit byte offset, not an element index.
The architectural atomicity guarantee applies to naturally aligned accesses; misaligned support is execution-environment-defined.
The store writes the quad-precision format-width encoding and does not check or convert to another format.

FAQ

What unit is the FSQ offset in?

The offset is a byte offset encoded as a signed 12-bit immediate.

Does FSQ convert floating-point formats?

No. Memory instructions move the encoding bits for that format; use FCVT for format conversion.