Does NOP have a separate real-instruction encoding?
nop is an assembler pseudo-instruction. Its canonical encoding reuses ADDI x0, x0, 0, with no separate opcode.
RISC-V NOP (Assembler Pseudo-instruction)
nop is a nullary assembler pseudo-instruction with canonical 32-bit encoding ADDI x0, x0, 0 (0x00000013).
RV32IRV64II-type base encoding
Assembly Syntax
nopWrite nop with no explicit register or immediate operands; its canonical expansion is addi x0, x0, 0.
Assembler Identity & Architectural Effects
This page preserves the /instructions/nop entry and explains the assembler spelling and canonical base-instruction encoding. nop expands to ADDI x0, x0, 0, using the RV32I/RV64I I-type encoding; it has no separate opcode. Executing this canonical 32-bit encoding changes no architecturally visible state except advancing the PC by 4 bytes and incrementing applicable performance counters.
Canonical Encoding & Example
Canonical 32-bit I-type fields: imm[11:0]=000000000000, rs1=00000, funct3=000, rd=00000, opcode=0010011. Together they give 0x00000013.
RV32I/RV64I: successful execution of this canonical encoding at PC=0x1000 gives PC=0x1004, unchanged general registers and memory, and applicable performance-counter increments.
nop
# canonical base instruction: addi x0, x0, 0
# 32-bit encoding: 0x00000013Usage
- Align code segments
- Leave space for inline code modifications
Pitfalls
The canonical NOP encoding is ADDI x0, x0, 0. Other encodings that leave architectural state unchanged are available as HINTs; they are not all the canonical NOP encoding.
NOP does not imply a fixed cycle count or fixed pipeline-resource consumption; the specification allows microarchitectural optimization.
x0 is always zero. This canonical encoding leaves general registers and memory unchanged, while the PC and applicable performance counters still advance.
FAQ
Does NOP leave all state unchanged?
It changes no architecturally visible state except advancing the PC and incrementing applicable performance counters. The canonical 32-bit encoding advances the PC by 4 bytes.
Why specify a canonical NOP encoding?
A canonical encoding permits microarchitectural optimization and more readable disassembly output. Other NOP encodings are available for HINTs.