SLLI.UW

RISC-V SLLI.UW Instruction Details

Instruction ManualI-type

Shift left unsigned word by immediate (RV64)

Instruction Syntax

slli.uw rd, rs1, shamt
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
BZbaAddress Generation

Instruction Behavior

Zero-extends lower 32 bits of rs1, shifts left by shamt (0-63). Equivalent to add.uw followed by slli. Part of Zba.

Quick Understanding & Search Notes

SLLI.UW is a B/Zba instruction for zero-extend low word then shift left immediate. This page is checked against the official B extension semantics, with emphasis on XLEN, W suffixes, .uw suffixes, and bitwise or rotate boundaries.

It extracts and zero-extends the low 32 bits of rs1, then shifts left by the immediate.
It is an RV64 Zba instruction useful for unsigned 32-bit index expansion; do not treat it as sign-extension followed by a shift.

Common Usage Scenarios

Shift & Rotate

Understand this scenario with real code like «slli.uw x10, x11, 4 ; x10 = zero_ext(x11[31:0]) << 4».

Type Conversion

Understand this scenario with real code like «slli.uw x10, x11, 4 ; x10 = zero_ext(x11[31:0]) << 4».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is I-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

RV64 only
shamt range 0-63

FAQ

Does SLLI.UW access memory?

No. It only reads and writes integer registers; any memory access must be performed by a separate load or store instruction.

What is the result width of SLLI.UW?

Except that W-suffixed forms produce a 32-bit result then sign-extend and .uw forms first extract a 32-bit unsigned operand, the result is written to rd at XLEN width.