Does SM3P0 use floating-point or vector registers?
No. These scalar crypto extension instructions use integer X registers.
SM3P0
RISC-V SM3P0 Instruction Details
Instruction ManualI-typeSM3 hash P0 permutation: P0(x) = x ^ ROTL(x,9) ^ ROTL(x,17)
Instruction Syntax
sm3p0 rd, rs1
Syntax is sm3p0 rd, rs1; operands select integer x0–x31 or ABI names, with no assembly immediate.
32-bit OP-IMM: bits31..20=000100001000, funct3=001, opcode=0010011; the selector is a fixed encoding field.
RV32/RV64 Zksh (also in Zks); XOR the low 32 source bits with their left rotations by 9 and 17, then sign-extend the result to XLEN.
An x0 source is zero and writes to x0 are discarded; overlap reads values before writeback and equal sources share one value. Execution latency must be data-independent.
ZkshCrypto & Security
Related Search Terms
Instruction Behavior
sm3p0 implements SM3 P0 on RV32/RV64: take r1=X(rs1)[31:0], compute r1 ^ ROL32(r1,9) ^ ROL32(r1,17), and sign-extend the result to XLEN in rd.
SM3P0 Decode And Execute Animation
Bounded teaching inputs execute the official SM3 fixed-width bit operations; this does not model a complete algorithm or microarchitecture.
rd
rs1
sm3p0
,
Initially rd shares the source value when rd=rs1; otherwise the demo starts rd at 0. An rs1=x0 source always reads 0. SM3P0 is defined in RV32/RV64; RV64 uses X(rs1)[31:0] and sign-extends the 32-bit result to XLEN.
fixed selector
source
fixed
destination
OP-IMM
31..20
000100001000
19..15
rs1=x11
14..12
001
11..7
rd=x10
6..0
0010011
Execution Data Path
inb
0x89ABCDEF
rol32(inb, 9)
0x579BDF13
rol32(inb, 17)
0x9BDF1357
result
0x45EF01AB
Architectural Result
a0(x10) = 0x00000000
This animation shows only official ISA fields and architectural state; it does not model a complete hash algorithm, pipeline, cache, or timing implementation.
Quick Understanding & Search Notes
sm3p0 computes the 32-bit SM3 P0 transform, sign-extending the result on RV64.
All operands are integer X registers; this instruction must have data-independent execution latency.
Common Usage Scenarios
Crypto & Security
RV32/RV64 Zksh, a1=1: the page's formula gives a0=0x00020201.
Chinese National Crypto
RV32/RV64 Zksh, a1=1: the page's formula gives a0=0x00020201.
Pre-Use Checklist
Syntax Check
- Syntax is sm3p0 rd, rs1; operands select integer x0–x31 or ABI names, with no assembly immediate.
- 32-bit OP-IMM: bits31..20=000100001000, funct3=001, opcode=0010011; the selector is a fixed encoding field.
Semantic Check
- RV32/RV64 Zksh (also in Zks); XOR the low 32 source bits with their left rotations by 9 and 17, then sign-extend the result to XLEN.
- An x0 source is zero and writes to x0 are discarded; overlap reads values before writeback and equal sources share one value. Execution latency must be data-independent.
Pitfalls / Common Confusions
P0 XORs the original input with both rotate-left terms.
RV64 ignores the upper 32 source bits and sign-extends the 32-bit result to 64 bits.
FAQ
Is SM3P0 a complete algorithm implementation?
No. It implements one SM3 P0 transform defined by the manual.