Does VMADC.VV write the add/subtract result?
No. It writes only carry or borrow mask bits; data results come from instructions such as VADC/VSBC.
VMADC.VV
RISC-V VMADC.VV Instruction Details
Instruction ManualR-typeCompute element-wise add carry-out and write the Boolean result to mask destination vd.
Instruction Syntax
vmadc.vv vd, vs2, vs1
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
VVector IntegerCarry/Borrow
Instruction Behavior
VMADC.VV is a RISC-V V vector add carry-out instruction. It does not write the integer sum or difference; it writes each element's carry-out as a destination mask bit. The form without the m suffix has no carry input and no ordinary execution-mask operand. The destination is a mask register, not an ordinary SEW-width integer result.
Quick Understanding & Search Notes
VMADC.VV generates a carry mask; in m forms, v0 is the carry/borrow input, not an ordinary execution mask.
Destination vd holds a one-bit mask result, one bit per element.
Forms without the m suffix do not read v0 as carry/borrow input.
Pair with VADC/VSBC for multiword add/subtract.
Common Usage Scenarios
Multi-Precision Add
Understand this scenario with real code like «vmadc.vv v1, v2, v3».
BigInt
Understand this scenario with real code like «vmadc.vv v1, v2, v3».
Carry Propagation
Understand this scenario with real code like «vmadc.vv v1, v2, v3».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Carry is a single mask bit, not full SEW value
No carry-in in the non-m form; distinguish from vmadc.vvm (carry-in, vm=0)